[[!meta title="NetBSD/evbarm on NVIDIA Tegra"]] The NetBSD tegra port currently supports the NVIDIA Tegra K1 (32-bit) system-on-a-chip. The [NVIDIA Jetson TK1 development kit](https://developer.nvidia.com/jetson-tk1) is a board based on the Tegra K1 SoC. [[!toc levels=2]] # Supported hardware - CPU: Cortex-A15: NVIDIA Tegra K1 (T124) (4-core) - VFP / NEON - CPU frequency scaling - GIC - ARM generic timer - Clock and reset controller - GPIO controller - MPIO / pinmux controller - Memory controller - Power management controller - I2C controller - UART [[!template id=man name="com" section="4"]] serial console - RTC - Watchdog timer - SDMMC [[!template id=man name="sdhc" section="4"]] controller - USB 2.0 [[!template id=man name="ehci" section="4"]] controller - PCI express - SATA [[!template id=man name="ahcisata" section="4"]] controller - HDMI - Framebuffer console - HDMI Audio [[!template id=man name="hdaudio" section="4"]] controller - HDMI CEC - Jetson TK1 - On-board Realtek 8111G [[!template id=man name="re" section="4"]] gigabit ethernet - EEPROM [[!template id=man name="seeprom" section="4"]] (on I2C) - TMP451 [[!template id=man name="titemp" section="4"]] temperature sensor (on I2C) - RF kill switch - Power button - AS3722 power management unit - eFUSE - SoC thermal sensors # TODO - Memory controller SMMU support - APB DMA - Audio Hub (AHUB) - GPU (nouveau) - USB 3.0 [[!template id=man name="xhci" section="4"]] controller - SPI controller - PWM controller - PCIe MSI support - CL-DVFS - LVDS/eDP display output # Generating a boot script [[!template id=programlisting text=""" $ cat boot.txt setenv bootargs root=ld1a fatload mmc 1:1 0x90000000 netbsd.ub bootm 0x90000000 $ mkubootimage -A arm -C none -O netbsd -T script -a 0 -n "NetBSD/tegra boot" boot.txt boot.scr """]] # Getting U-Boot Jetson TK1 boards come with Linux4Tegra R19.x installed, which doesn't use U-Boot. The easiest way to get U-Boot is to upgrade to Linux4Tegra R21.x (Linux PC or VM required) following the [quick start guide](http://developer.download.nvidia.com/embedded/L4T/r21_Release_v4.0/l4t_quick_start_guide.txt). # Modesetting ## Console To override the default video mode (auto-detected from display EDID), use the *video* kernel command-line parameter: [[!template id=programlisting text=""" video=<xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] """]] ## Xorg To be able to use the mode setting features of the Tegra DRM driver, you must use the xf86-video-modesetting driver. Put this in xorg.conf: [[!template id=programlisting text=""" Section "Device" Identifier "DRM Modesetting" Driver "modesetting" EndSection """]] # dmesg [[!template id=programlisting text=""" Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015 The NetBSD Foundation, Inc. All rights reserved. Copyright (c) 1982, 1986, 1989, 1991, 1993 The Regents of the University of California. All rights reserved. NetBSD 7.99.21 (JETSONTK1) #258: Thu Nov 12 06:45:09 AST 2015 jmcneill@megatron.local:/Users/jmcneill/netbsd/src/sys/arch/evbarm/compile/obj/JETSONTK1 total memory = 2047 MB avail memory = 2021 MB sysctl_createv: sysctl_create(machine_arch) returned 17 timecounter: Timecounters tick every 10.000 msec mainbus0 (root) cpu0 at mainbus0 core 0: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core) cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled cpu0: 32KB/64B 2-way L1 PIPT Instruction cache cpu0: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache cpu0: 2048KB/64B 16-way write-through L2 PIPT Unified cache vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals cpu1 at mainbus0 core 1 cpu2 at mainbus0 core 2 cpu3 at mainbus0 core 3 armperiph0 at mainbus0 armgic0 at armperiph0: Generic Interrupt Controller, 192 sources (183 valid) armgic0: 32 Priorities, 160 SPIs, 7 PPIs, 16 SGIs armgtmr0 at armperiph0: ARMv7 Generic 64-bit Timer (12000 kHz) armgtmr0: interrupting on irq 27 timecounter: Timecounter "armgtmr0" frequency 12000000 Hz quality 500 tegraio0 at mainbus0: Tegra K1 (T124) tegracar0 at tegraio0: CAR tegracar0: PLLX = 2292000000 Hz tegracar0: PLLC = 88000000 Hz tegracar0: PLLE = 292968 Hz tegracar0: PLLU = 480000000 Hz tegracar0: PLLP0 = 408000000 Hz tegracar0: PLLD2 = 594000000 Hz tegragpio0 at tegraio0: GPIO gpio0 at tegragpio0 (A): 8 pins gpio1 at tegragpio0 (B): 8 pins gpio2 at tegragpio0 (C): 8 pins gpio3 at tegragpio0 (D): 8 pins gpio4 at tegragpio0 (E): 8 pins gpio5 at tegragpio0 (F): 8 pins gpio6 at tegragpio0 (G): 8 pins gpio7 at tegragpio0 (H): 8 pins gpio8 at tegragpio0 (I): 8 pins gpio9 at tegragpio0 (J): 8 pins gpio10 at tegragpio0 (K): 8 pins gpio11 at tegragpio0 (L): 8 pins gpio12 at tegragpio0 (M): 8 pins gpio13 at tegragpio0 (N): 8 pins gpio14 at tegragpio0 (O): 8 pins gpio15 at tegragpio0 (P): 8 pins gpio16 at tegragpio0 (Q): 8 pins gpiobutton0 at gpio16 pins 0: Power button gpio17 at tegragpio0 (R): 8 pins gpio18 at tegragpio0 (S): 8 pins gpio19 at tegragpio0 (T): 8 pins gpio20 at tegragpio0 (U): 8 pins gpio21 at tegragpio0 (V): 8 pins gpio22 at tegragpio0 (W): 8 pins gpio23 at tegragpio0 (X): 8 pins gpiorfkill0 at gpio23 pins 7 gpio24 at tegragpio0 (Y): 8 pins gpio25 at tegragpio0 (Z): 8 pins gpio26 at tegragpio0 (AA): 8 pins gpio27 at tegragpio0 (BB): 8 pins gpio28 at tegragpio0 (CC): 8 pins gpio29 at tegragpio0 (DD): 8 pins gpio30 at tegragpio0 (EE): 8 pins tegratimer0 at tegraio0: Timers tegratimer0: default watchdog period is 10 seconds tegramc0 at tegraio0: MC tegrapmc0 at tegraio0: PMC tegraxusbpad0 at tegraio0: XUSB PADCTL tegrampio0 at tegraio0: MPIO tegrai2c0 at tegraio0 port 0: I2C1 tegrai2c0: interrupting on irq 70 iic0 at tegrai2c0: I2C bus seeprom0 at iic0 addr 0x56: AT24Cxx or compatible EEPROM: size 256 titemp0 at iic0 addr 0x4c: TMP451 tegrai2c1 at tegraio0 port 1: I2C2 tegrai2c1: interrupting on irq 116 iic1 at tegrai2c1: I2C bus tegrai2c2 at tegraio0 port 2: I2C3 tegrai2c2: interrupting on irq 124 iic2 at tegrai2c2: I2C bus tegrai2c3 at tegraio0 port 3: I2C4 tegrai2c3: interrupting on irq 152 iic3 at tegrai2c3: I2C bus ddc0 at iic3 addr 0x50: DDC tegrai2c4 at tegraio0 port 4: I2C5 tegrai2c4: interrupting on irq 85 iic4 at tegrai2c4: I2C bus as3722pmic0 at iic4 addr 0x40: AMS AS3822 com3 at tegraio0 port 3: ns16550a, working fifo com3: console tegrartc0 at tegraio0: RTC sdhc2 at tegraio0 port 2: SDMMC3 sdhc2: interrupting on irq 51 sdhc2: SDHC 4.0, rev 3, 32-bit ADMA2, 204000 kHz, HS SDR50 SDR104 HS200 1.8V 3.0V 3.3V, re-tuning mode 1, 4096 byte blocks sdmmc2 at sdhc2 slot 0 sdhc3 at tegraio0 port 3: SDMMC4 sdhc3: interrupting on irq 63 sdhc3: SDHC 4.0, rev 3, 32-bit ADMA2, 204000 kHz, HS SDR50 SDR104 HS200 1.8V 3.0V 3.3V, re-tuning mode 1, 4096 byte blocks sdmmc3 at sdhc3 slot 0 ahcisata0 at tegraio0: SATA ahcisata0: interrupting on irq 55 ahcisata0: AHCI revision 1.31, 2 ports, 32 slots, CAP 0xe620ff01<PSC,SSC,PMD,ISS=0x2=Gen2,SAL,SALP,SSNTF,SNCQ,S64A> atabus0 at ahcisata0 channel 0 hdaudio0 at tegraio0: HDA hdaudio0: interrupting on irq 113 hdafg0 at hdaudio0: NVIDIA Tegra124 HDMI hdafg0: HDMI00 8ch: Digital Out [Jack] hdafg0: 8ch/0ch 44100Hz PCM16* audio0 at hdafg0: full duplex, playback, capture, mmap, independent tegracec0 at tegraio0: HDMI CEC tegracec0: interrupting on irq 35 hdmicec0 at tegracec0 tegrausbphy0 at tegraio0 port 0: USB PHY1 ehci0 at tegraio0 port 0: USB1 ehci0: interrupting on irq 52 ehci0: EHCI version 1.10 ehci0: switching to host mode usb0 at ehci0: USB revision 2.0 tegrausbphy1 at tegraio0 port 1: USB PHY2 ehci1 at tegraio0 port 1: USB2 ehci1: interrupting on irq 53 ehci1: EHCI version 1.10 ehci1: switching to host mode usb1 at ehci1: USB revision 2.0 tegrausbphy2 at tegraio0 port 2: USB PHY3 ehci2 at tegraio0 port 2: USB3 ehci2: interrupting on irq 129 ehci2: EHCI version 1.10 ehci2: switching to host mode usb2 at ehci2: USB revision 2.0 tegrahost1x0 at tegraio0: HOST1X tegradrm0 at tegraio0 drm: Supports vblank timestamp caching Rev 2 (21.10.2013). drm: No driver support for vblank timestamp query. tegrafb0 at tegradrm0 tegrafb0: framebuffer at 0x9ab00000, size 1280x720, depth 32, stride 5120 wsdisplay0 at tegrafb0 kbdmux 1 wsmux1: connecting to wsdisplay0 wsdisplay0: screen 0-3 added (default, vt100 emulation) tegradrm0: info: registered panic notifier tegradrm0: initialized tegra 0.1.0 20151108 on minor 0 tegrapcie0 at tegraio0: PCIE tegrapcie0: interrupting on irq 130 pci0 at tegrapcie0 bus 0 pci0: memory space enabled, rd/line, rd/mult, wr/inv ok ppb0 at pci0 dev 0 function 0: vendor 10de product 0e12 (rev. 0xa1) ppb0: PCI Express capability version 2 <Root Port of PCI-E Root Complex> x2 @ 5.0GT/s ppb0: link is x1 @ 2.5GT/s pci1 at ppb0 bus 1 pci1: memory space enabled, rd/line, wr/inv ok athn0 at pci1 dev 0 function 0athn0: Atheros AR9285 athn0: rev 2 (1T1R), ROM rev 13, address 00:17:c4:d7:d0:58 athn0: interrupting at irq 130 athn0: 11b rates: 1Mbps 2Mbps 5.5Mbps 11Mbps athn0: 11g rates: 1Mbps 2Mbps 5.5Mbps 11Mbps 6Mbps 9Mbps 12Mbps 18Mbps 24Mbps 36Mbps 48Mbps 54Mbps ppb1 at pci0 dev 1 function 0: vendor 10de product 0e13 (rev. 0xa1) ppb1: PCI Express capability version 2 <Root Port of PCI-E Root Complex> x1 @ 5.0GT/s ppb1: link is x1 @ 2.5GT/s pci2 at ppb1 bus 2 pci2: memory space enabled, rd/line, wr/inv ok re0 at pci2 dev 0 function 0: RealTek 8168/8111 PCIe Gigabit Ethernet (rev. 0x0c) re0: interrupting at irq 130 re0: Ethernet address 00:04:4b:2f:51:a2 re0: using 512 tx descriptors rgephy0 at re0 phy 7: RTL8251 1000BASE-T media interface, rev. 0 rgephy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0 cpu2: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core) cpu2: DC enabled IC enabled WB disabled EABT branch prediction enabled cpu2: 32KB/64B 2-way L1 PIPT Instruction cache cpu2: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache cpu2: 2048KB/64B 16-way write-through L2 PIPT Unified cache vfp2 at cpu2: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals cpu1: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core) cpu1: DC enabled IC enabled WB disabled EABT branch prediction enabled cpu1: 32KB/64B 2-way L1 PIPT Instruction cache cpu1: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache cpu1: 2048KB/64B 16-way write-through L2 PIPT Unified cache vfp1 at cpu1: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals cpu3: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core) cpu3: DC enabled IC enabled WB disabled EABT branch prediction enabled cpu3: 32KB/64B 2-way L1 PIPT Instruction cache cpu3: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache cpu3: 2048KB/64B 16-way write-through L2 PIPT Unified cache vfp3 at cpu3: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals uhub0 at usb0: Tegra EHCI root hub, class 9/0, rev 2.00/1.00, addr 1 uhub0: 1 port with 1 removable, self powered uhub1 at usb1: Tegra EHCI root hub, class 9/0, rev 2.00/1.00, addr 1 uhub1: 1 port with 1 removable, self powered uhub2 at usb2: Tegra EHCI root hub, class 9/0, rev 2.00/1.00, addr 1 uhub2: 1 port with 1 removable, self powered sdhc3: cmd timeout error IPsec: Initialized Security Association Processing. ahcisata0 port 0: device present, speed: 3.0Gb/s ld0 at sdmmc3: <0x45:0x0100:SEM16G:0x00:0x0301ff34:0x000> ld0: 15028 MB, 7633 cyl, 64 head, 63 sec, 512 bytes/sect x 30777344 sectors ld0: GPT GUID: a81e231f-7b1c-c564-1473-5ac55e4b7963 dk0 at ld0: "APP", 29360128 blocks at 94208, type: <unknown> ld1 at sdmmc2: <0x27:0x5048:SD64G:0x30:0x01ce4def:0x0dc> dk1 at ld0: "DTB", 8192 blocks at 29454336, type: <unknown> dk2 at ld0: "EFI", 131072 blocks at 29462528, type: <unknown> dk3 at ld0: "USP", 8192 blocks at 29593600, type: <unknown> dk4 at ld0: "TP1", 8192 blocks at 29601792, type: <unknown> dk5 at ld0: "TP2", 8192 blocks at 29609984, type: <unknown> dk6 at ld0: "TP3", 8192 blocks at 29618176, type: <unknown> dk7 at ld0: "WB0", 4096 blocks at 29626368, type: <unknown> dk8 at ld0: "UDA", 1142784 blocks at 29630464, type: <unknown> ld0: 8-bit width, HS200, 200.000 MHz ld1: 59504 MB, 7585 cyl, 255 head, 63 sec, 512 bytes/sect x 121864192 sectors ld1: 4-bit width, SDR104, 204.000 MHz wd0 at atabus0 drive 0 wd0: <OCZ-AGILITY3> wd0: drive supports 16-sector PIO transfers, LBA48 addressing wd0: 111 GB, 232581 cyl, 16 head, 63 sec, 512 bytes/sect x 234441648 sectors wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133) wd0(ahcisata0:0:0): using PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133) (using DMA) uhidev0 at uhub2 port 1 configuration 1 interface 0 uhidev0: Logitech USB Receiver, rev 2.00/29.00, addr 2, iclass 3/1 ukbd0 at uhidev0: 8 modifier keys, 6 key codes wskbd0 at ukbd0 mux 1 wskbd0: connecting to wsdisplay0 uhidev1 at uhub2 port 1 configuration 1 interface 1 uhidev1: Logitech USB Receiver, rev 2.00/29.00, addr 2, iclass 3/1 uhidev1: 17 report ids ums0 at uhidev1 reportid 2: 16 buttons, W and Z dirs wsmouse0 at ums0 mux 0 uhid0 at uhidev1 reportid 3: input=4, output=0, feature=0 uhid1 at uhidev1 reportid 4: input=1, output=0, feature=0 uhid2 at uhidev1 reportid 16: input=6, output=6, feature=0 uhid3 at uhidev1 reportid 17: input=19, output=19, feature=0 boot device: wd0 root on wd0a dumps on wd0b root file system type: ffs kern.module.path=/stand/evbarm/7.99.21/modules WARNING: preposterous TOD clock time WARNING: using filesystem time WARNING: CHECK AND RESET THE DATE! """]] # Links - [NVIDIA Jetson TK1 development kit](https://developer.nvidia.com/jetson-tk1) - [Hardware documentation](https://developer.nvidia.com/hardware-design-and-development) - [Linux For Tegra](https://developer.nvidia.com/linux-tegra)