1: [[!meta title="G-REX"]]
3: Programming the G-REX PCI bridge
5: document version 0.2 - THIS IS A WORK IN PROGRESS!
7: # 0. Introduction
9: This document describes software/hardware interface of the G-REX PCI bridge
10: for Amiga computers. What you're reading is a result of reverse engineering,
11: which was long and difficult process.
13: Next time when you're going to buy a hardware product for your Amiga, don't
14: forget to ask the vendor to make the programming documentation publicly
15: available! Remeber that hardware without software is just a piece of junk...
16: and you can't write software without hardware documentation.
18: In case you've noticed an error in this document please let me know.
20: # 1. Theory of operation
22: G-REX is an evolution of PCI bridge used previously on CyberVisionPPC and
23: BlizzardVisionPPC cards. These products share a lot of similiarities (at
24: least when it comes to PCI interface). In fact CVPPC/BVPPC can be treated as
25: a special one-slot version of G-REX. Maybe actually it's the other way around
28: Firmware does the dirty job of assigning PCI resources (BARs, interrupt lines,
29: etc.) before the OS is running. Therefore G-REX does not need any special
32: All memory spaces of G-REX are directly visible and addressable in Amiga memory
33: space, unlike in Mediator. Firmware allocates memory space as needed, depending
34: on what cards are installed.
36: # 2. Memory map
38: G-REX is configured as multipie AutoConf boards. Confusingly, they all have the same vendor (8512) and product (101).
40: 0xFFFA0000 - PCI I/O register space, 64KB.
42: 0xFFFC0000 - PCI configuration space, 128KB.
44: 0xFFFE0000 - Bridge configuration registers, 4kB.
46: 0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed.
48: # 2a. PCI configuration space (0xFFFA0000)
50: Access to configuration space is a bit tricky. Be warned that access to
51: addresses not used by G-REX generates bus error (esp. to configuration
52: locations which are unused because there is no card in the slot). Depending on
53: how these errors are supported in your OS, it may be important to trap them and
54: handle correctly.
56: Configuration data for first slot seems to be accessible at offset +0x1000 (on
57: CVPPC/BVPPC there's aslo a mirror on +0x0).
59: [TO BE COMPLETED]
61: # 2b. PCI I/O registers space (0xFFFC0000)
63: This space offers access to I/O registers of all PCI cards.
65: On G-REX BAR addresses in this space are treated as absolute.
67: On CVPPC/BVPPC BAR addresses in this space are treated as relative to
68: 0xFFFA0000. Card with I/O BAR set to 0x100 will actually be available
69: at 0xFFFA0100.
71: # 2c. PCI memory space (0x80000000)
73: This space offers access to memory (and memory-mapped registers) of PCI cards.
74: Each PCI memory BAR is assigned a separate AutoConf board during firmware
77: For example Voodoo 3, which has two 32MB memory BARs, will be visible as
78: two 8512/101 boards somewhere at 0x80000000 (or later).
80: Addresses in this space are treated as absolute. Memory BAR register set to
81: 0x80000000 means it is configured at this address.
83: On CVPPC/BVPPC this space is present at different address - 0xE0000000.
85: # 2d. Bridge configuration registers
87: Offset - meaning
89: 0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode
91: 0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side)
93: No need to fiddle with these registers, as they've been already configured properly by the firmware.
95: # 3. Reconfiguring the bus
97: If needed, it's possible to reconfigure bus just by writing new values into
98: configuration space. Keep in mind that any previously initialized chips will
99: need to be reset and initialized again (for example 3Dfx Voodoo 3, which is
100: initialized by the firmware so it can display early startup menu).
102: # 4. Interrupts
104: All interrupts are converted into Amiga INT2 interrupt. There's no such thing
105: as interrupt acknowledge register. However, there seems to be an interrupt
106: enable register (see "Bridge configuration registers" above).
108: # 5. DMA
110: The bridge is certainly capable of real busmaster DMA, but it needs further
111: reverse engineering.
113: [TO BE COMPLETED]
115: There were at least two different revisions of G-REX 1200. Later revision
116: probably does support DMA in first two slots. I'm not sure if it is possible
117: to detect revision of the G-REX in software.
119: G-REX 4000D probably has busmaster DMA capability in all slots.
121: # 6. Sample PCI bridge driver implementation
123: The NetBSD [[p5pb|http://netbsd.gw.com/cgi-bin/man-cgi?p5pb+4.amiga+NetBSD-current]]
124: driver serves as an example driver implementation. It was written using the
125: same knowledge that went into this document.
127: The driver consists of several files in [[src/sys/arch/amiga/pci|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/]] directory.
129: p5membar.c - Dummy driver handling AutoConf resources.
130: p5membarvar.h - Structures used by the p5membar.
131: p5pb.c - Main driver code.
132: p5pbreg.h - Inlcude file containing register locations.
133: p5pbvar.h - Structures used by the p5pb.
135: The p5pb does attach on top of p5bus, however p5membar drivers attach on top of zbus (since 8512/101 entries are seen as Zorro boards).
137: # 7. Thanks
139: [[AmiBay|http://www.amibay.com]] users d0pefish and ramborolf helped testing
140: early versions of p5pb driver. Without their help this document would not
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