1: [[!meta title="G-REX"]]
3: Programming the G-REX PCI bridge
4: version 0 - THIS IS A WORK IN PROGRESS!
6: # 0. Introduction
8: This document describes software/hardware interface of the G-REX PCI bridge for Amiga computers. What you're
9: reading is a result of reverse engineering, which was long and difficult process.
11: Next time when you're going to buy a hardware product for your Amiga, don't forget to ask the vendor to make the
12: programming documentation publicly available! Remeber that hardware without software is just a piece of junk...
13: and you can't write software without hardware documentation.
15: In case you've noticed an error in this document please let me know.
17: # 1. Theory of operation
19: G-REX is an evolution of PCI bridge used previously on CyberVisionPPC and BlizzardVisionPPC cards. These
20: products share a lot of similiarities.
22: Firmware does the dirty job of assigning PCI resources (BARs, interrupt lines, etc.) before the OS is running.
23: Therefore G-REX does not need any special initialization.
25: # 2. Memory map
27: G-REX is configured as multipie AutoConf boards. Confusingly, they all have the same vendor and product ID.
29: 0xFFFA0000 - PCI I/O register space, 64KB.
30: 0xFFFC0000 - PCI configuration space, 128KB.
31: 0xFFFE0000 - Bridge configuration registers, 4kB.
33: 0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed.
35: # 2a. PCI configuration space
37: Access to configuration space is a bit tricky. Be warned that access to addresses not used by G-REX generates bus
38: error (esp. to configuration locations which are unused because there is no card in the slot). Depending on how these
39: errors are supported in your OS, it may be important to trap them and handle correctly.
41: Configuration data for first slot seems to be accessible at +0x1000.
43: [TO BE COMPLETED]
45: # 2b. PCI I/O registers space
47: This space offers access to I/O registers of all PCI cards.
49: BAR addresses in this space are treated as relative to 0xFFFA0000. Card with I/O BAR set to 0x100 will actually be
50: available at 0xFFFA0100.
52: # 2c. PCI memory space
54: This space offers access to memory (and memory-mapped registers) of PCI cards. Each PCI memory BAR is assigned a
55: separate AutoConf board during firmware initialization.
57: Addresses in this space are treated as absolute. Memory BAR register set to 0x80000000 means it is configured at this
60: # 2d. Bridge configuration registers
62: Offset - meaning
63: 0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode
64: 0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side)
66: No need to fiddle with these registers, as they've been already configured properly by the firmware.
68: # 3. Reconfiguring the bus.
70: If needed, it's possible to reconfigure bus just by writing new values into configuration space. Keep in mind that any
71: previously initialized chips will need to be reset and initialized again (for example 3Dfx Voodoo 3, which is
72: initialized by the firmware so it can display early startup menu).
74: # 4. Interrupts
76: All interrupts are converted into Amiga INT2 interrupt. There's no such thing as interrupt acknowledge register.
78: # 5. DMA
80: The bridge is certainly capable of DMA, but it needs further reverse engineering.
82: [TO BE COMPLETED]
84: There were at least two different revisions of G-REX 1200. Later revision probably does support DMA in all slots.
86: G-REX 4000D probably has busmaster DMA capability in all slots.
88: # 6. Sample PCI bridge driver implementation
90: The NetBSD p5pb driver serves as example driver implementation. It was written using the same knowledge that went
91: into this document.
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