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Further extend G-REX doc.

    1: [[!meta title="G-REX"]]
    2: 
    3: Programming the G-REX PCI bridge
    4: 
    5: document version 0.2 - THIS IS A WORK IN PROGRESS!
    6: 
    7: # 0. Introduction
    8: 
    9: This document describes software/hardware interface of the G-REX PCI bridge 
   10: for Amiga computers. What you're reading is a result of reverse engineering, 
   11: which was long and difficult process. 
   12: 
   13: Next time when you're going to buy a hardware product for your Amiga, don't 
   14: forget to ask the vendor to make the programming documentation publicly 
   15: available! Remeber that hardware without software is just a piece of junk...
   16: and you can't write software without hardware documentation.
   17: 
   18: In case you've noticed an error in this document please let me know. 
   19: 
   20: # 1. Theory of operation
   21: 
   22: G-REX is connected to local expansion slot present on CyberStorm PPC and 
   23: Blizzard PPC.  
   24: 
   25: G-REX is an evolution of PCI bridge used previously on CyberVisionPPC and 
   26: BlizzardVisionPPC cards. These products share a lot of similiarities (at 
   27: least when it comes to PCI interface). In fact CVPPC/BVPPC can be treated as
   28: a special one-slot version of G-REX. Maybe actually it's the other way around
   29: ;-). 
   30: 
   31: Firmware does the dirty job of assigning PCI resources (BARs, interrupt lines, 
   32: etc.) before the OS is running. Therefore G-REX does not need any special 
   33: initialization.
   34: 
   35: All memory spaces of G-REX are directly visible and addressable in Amiga memory
   36: space, unlike in Mediator. Firmware allocates memory space as needed, depending
   37: on what cards are installed.
   38: 
   39: Blizzard PPC hardware revision 0 is not compatible with G-REX
   40: (which revisions are compatible?). 
   41: 
   42: # 2. Memory map
   43: 
   44: G-REX is configured as multipie AutoConf boards. Confusingly, they all have the 
   45: same vendor (8512) and product (101).
   46: 
   47: 0xFFFA0000 - PCI I/O register space, 64KB.
   48: 
   49: 0xFFFC0000 - PCI configuration space, 128KB.
   50: 
   51: 0xFFFE0000 - Bridge configuration registers, 4kB.
   52: 
   53: 0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed. 
   54: 
   55: # 2a. PCI configuration space (0xFFFA0000)
   56: 
   57: Access to configuration space is a bit tricky. Be warned that access to 
   58: addresses not used by G-REX generates bus error (esp. to configuration 
   59: locations which are unused because there is no card in the slot). Depending on 
   60: how these errors are supported in your OS, it may be important to trap them and
   61: handle correctly. 
   62: 
   63: Configuration data for first slot seems to be accessible at offset +0x1000 (on 
   64: CVPPC/BVPPC there's aslo a mirror on +0x0).
   65: 
   66: [TO BE COMPLETED]
   67: 
   68: # 2b. PCI I/O registers space (0xFFFC0000)
   69: 
   70: This space offers access to I/O registers of all PCI cards.
   71: 
   72: On G-REX BAR addresses in this space are treated as absolute.
   73: 
   74: On CVPPC/BVPPC BAR addresses in this space are treated as relative to 
   75: 0xFFFA0000. Card with I/O BAR set to 0x100 will actually be available 
   76: at 0xFFFA0100. 
   77: 
   78: # 2c. PCI memory space (0x80000000)
   79: 
   80: This space offers access to memory (and memory-mapped registers) of PCI cards. 
   81: Each PCI memory BAR is assigned a separate AutoConf board during firmware 
   82: initialization.
   83: 
   84: For example Voodoo 3, which has two 32MB memory BARs, will be visible as 
   85: two 8512/101 boards somewhere at 0x80000000 (or later).
   86: 
   87: Addresses in this space are treated as absolute. Memory BAR register set to 
   88: 0x80000000 means it is configured at this address.
   89: 
   90: On CVPPC/BVPPC this space is present at different address - 0xE0000000.
   91: 
   92: # 2d. Bridge configuration registers
   93: 
   94: Offset - meaning
   95: 
   96: 0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode
   97: 
   98: 0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side)
   99: 
  100: No need to fiddle with these registers, as they've been already configured 
  101: properly by the firmware.
  102: 
  103: # 3. Detecting the G-REX
  104: 
  105: Since AutoConf entries are created by the firmware, G-REX needs a special 
  106: firmware for CyberStorm PPC and Blizzard PPC. Known CSPPC firmware revisions 
  107: supporting G-REX include 44.69 and 44.71.
  108: 
  109: Detecting the G-REX is done by looking for Phase5 vendor ID (8512) and product
  110: ID 101. Keep in mind that there will be more than one such board present, as
  111: expained above.
  112: 
  113: It is possible to misdetect CVPPC/BVPPC as G-REX, since it uses the same vendor 
  114: and product ID if G-REX firmware is installed. With older firmware versions 
  115: these cards have no associated AutoConf entries.
  116: 
  117: Differentiating between CVPPC/BVPPC and G-REX in this situation is possible
  118: by looking for Texas Instruments TVP4020 vendor and product ID at the beginning
  119: of PCI configuration space. Configuration data for Permedia 2 chip will be
  120: available at offset 0x0 on CVPPC/BVPPC, but on G-REX first slot is located
  121: at offset 0x1000. See [[p5pb_identify_bridge()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_identify_bridge]] and [[p5pb_cvppc_probe()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_cvppc_probe]] functions
  122: in the NetBSD driver.
  123: 
  124: # 4. Reconfiguring the bus
  125: 
  126: If needed, it's possible to reconfigure bus just by writing new values into 
  127: configuration space. Keep in mind that any previously initialized chips will 
  128: need to be reset and initialized again (for example 3Dfx Voodoo 3, which is
  129: initialized by the firmware so it can display early startup menu). 
  130: 
  131: # 5. Interrupts
  132: 
  133: All interrupts are converted into Amiga INT2 interrupt. There's no such thing 
  134: as interrupt acknowledge register. However, there seems to be an interrupt 
  135: enable register (see "Bridge configuration registers" above).
  136: 
  137: # 6. DMA
  138: 
  139: The bridge is certainly capable of real busmaster DMA, but it needs further 
  140: reverse engineering.
  141: 
  142: [TO BE COMPLETED]
  143: 
  144: There were at least two different revisions of G-REX 1200. Later revision 
  145: probably does support DMA in first two slots. I'm not sure if it is possible
  146: to detect revision of the G-REX in software.
  147: 
  148: G-REX 4000D probably has busmaster DMA capability in all slots.
  149: 
  150: # 7. Sample PCI bridge driver implementation
  151: 
  152: The NetBSD [[p5pb|http://netbsd.gw.com/cgi-bin/man-cgi?p5pb+4.amiga+NetBSD-current]] 
  153: driver serves as an example driver implementation. It was written using the 
  154: same knowledge that went into this document.
  155: 
  156: The driver consists of several files in [[src/sys/arch/amiga/pci|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/]] directory.
  157: 
  158: * p5membar.c - Dummy driver handling AutoConf resources.
  159: * p5membarvar.h - Structures used by the p5membar.
  160: * p5pb.c - Main driver code.
  161: * p5pbreg.h - Inlcude file containing register locations.
  162: * p5pbvar.h - Structures used by the p5pb.
  163: 
  164: The p5pb does attach on top of p5bus, however p5membar drivers attach on top of zbus (since 8512/101 entries are seen as Zorro boards).
  165: 
  166: # 8. Thanks
  167: 
  168: [[AmiBay|http://www.amibay.com]] users d0pefish and ramborolf helped testing 
  169: early versions of p5pb driver. Without their help this document would not 
  170: exist.
  171: