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1.1       rkujawa     1: [[!meta title="G-REX"]]
                      2: 
                      3: Programming the G-REX PCI bridge
1.2     ! rkujawa     4: 
        !             5: document version 0 - THIS IS A WORK IN PROGRESS!
1.1       rkujawa     6: 
                      7: # 0. Introduction
                      8: 
                      9: This document describes software/hardware interface of the G-REX PCI bridge for Amiga computers. What you're
                     10: reading is a result of reverse engineering, which was long and difficult process. 
                     11: 
                     12: Next time when you're going to buy a hardware product for your Amiga, don't forget to ask the vendor to make the
                     13: programming documentation publicly available! Remeber that hardware without software is just a piece of junk...
                     14: and you can't write software without hardware documentation.
                     15: 
                     16: In case you've noticed an error in this document please let me know. 
                     17: 
                     18: # 1. Theory of operation
                     19: 
                     20: G-REX is an evolution of PCI bridge used previously on CyberVisionPPC and BlizzardVisionPPC cards. These
                     21: products share a lot of similiarities.
                     22: 
                     23: Firmware does the dirty job of assigning PCI resources (BARs, interrupt lines, etc.) before the OS is running. 
                     24: Therefore G-REX does not need any special initialization.
                     25: 
                     26: # 2. Memory map
                     27: 
                     28: G-REX is configured as multipie AutoConf boards. Confusingly, they all have the same vendor and product ID.
                     29: 
                     30: 0xFFFA0000 - PCI I/O register space, 64KB.
1.2     ! rkujawa    31: 
1.1       rkujawa    32: 0xFFFC0000 - PCI configuration space, 128KB.
1.2     ! rkujawa    33: 
1.1       rkujawa    34: 0xFFFE0000 - Bridge configuration registers, 4kB.
                     35: 
                     36: 0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed. 
                     37: 
                     38: # 2a. PCI configuration space
                     39: 
                     40: Access to configuration space is a bit tricky. Be warned that access to addresses not used by G-REX generates bus 
                     41: error (esp. to configuration locations which are unused because there is no card in the slot). Depending on how these
                     42: errors are supported in your OS, it may be important to trap them and handle correctly. 
                     43: 
                     44: Configuration data for first slot seems to be accessible at +0x1000.
                     45: 
                     46: [TO BE COMPLETED]
                     47: 
                     48: # 2b. PCI I/O registers space
                     49: 
                     50: This space offers access to I/O registers of all PCI cards.
                     51: 
                     52: BAR addresses in this space are treated as relative to 0xFFFA0000. Card with I/O BAR set to 0x100 will actually be 
                     53: available at 0xFFFA0100. 
                     54: 
                     55: # 2c. PCI memory space 
                     56: 
                     57: This space offers access to memory (and memory-mapped registers) of PCI cards. Each PCI memory BAR is assigned a 
                     58: separate AutoConf board during firmware initialization. 
                     59: 
                     60: Addresses in this space are treated as absolute. Memory BAR register set to 0x80000000 means it is configured at this
                     61: address.
                     62: 
                     63: # 2d. Bridge configuration registers
                     64: 
                     65: Offset - meaning
                     66: 0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode
                     67: 0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side)
                     68: 
                     69: No need to fiddle with these registers, as they've been already configured properly by the firmware.
                     70: 
                     71: # 3. Reconfiguring the bus.
                     72: 
                     73: If needed, it's possible to reconfigure bus just by writing new values into configuration space. Keep in mind that any
                     74: previously initialized chips will need to be reset and initialized again (for example 3Dfx Voodoo 3, which is
                     75: initialized by the firmware so it can display early startup menu). 
                     76: 
                     77: # 4. Interrupts
                     78: 
                     79: All interrupts are converted into Amiga INT2 interrupt. There's no such thing as interrupt acknowledge register.
                     80: 
                     81: # 5. DMA
                     82: 
                     83: The bridge is certainly capable of DMA, but it needs further reverse engineering.
                     84: 
                     85: [TO BE COMPLETED]
                     86: 
                     87: There were at least two different revisions of G-REX 1200. Later revision probably does support DMA in all slots.
                     88: 
                     89: G-REX 4000D probably has busmaster DMA capability in all slots.
                     90: 
                     91: # 6. Sample PCI bridge driver implementation
                     92: 
                     93: The NetBSD p5pb driver serves as example driver implementation. It was written using the same knowledge that went
                     94: into this document.
                     95: