version 1.8, 2012/07/08 12:30:39
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version 1.11, 2012/07/12 17:03:42
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Programming the G-REX PCI bridge |
Programming the G-REX PCI bridge |
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document version 0.2 - THIS IS A WORK IN PROGRESS! |
document version 0.4 |
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# 0. Introduction |
# 0. Introduction |
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Line 73 same vendor (8512) and product (101).
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Line 73 same vendor (8512) and product (101).
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0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed. |
0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed. |
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# 2a. PCI configuration space (0xFFFA0000) |
# 2a. PCI configuration space (0xFFFC0000) |
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Access to configuration space is a bit tricky. Be warned that access to |
Access to configuration space is a bit tricky. Be warned that access to |
addresses not used by G-REX generates bus error (esp. to configuration |
addresses not used by G-REX generates bus error (esp. to configuration |
Line 81 locations which are unused because there
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Line 81 locations which are unused because there
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how these errors are supported in your OS, it may be important to trap them and |
how these errors are supported in your OS, it may be important to trap them and |
handle correctly. |
handle correctly. |
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Configuration data for first slot seems to be accessible at offset +0x1000 (on |
Configuration data for first slot (device 0) is accessible at offset +0x1000, |
CVPPC/BVPPC there's aslo a mirror on +0x0). |
location for the next slots can be obtained by shifting the bit: |
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[TO BE COMPLETED] |
Configuration space address + (offset << device number) |
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For example to obtain configuration space for the second slot (device 1): |
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0xFFFC0000 + (0x1000 << 1) = 0xFFFC2000 |
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For the third slot (device 2): |
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0xFFFC0000 + (0x1000 << 2) = 0xFFFC4000 |
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and so on. |
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How to access device functions is not well analyzed, however funtion 0 is |
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always available at address computed by the above equation. Function 1 is |
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available at offset +0x100. One could assume that accessing the next |
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device functions is possible by shifting the bit (as with device access), |
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but that was not tested, becasue cards with more than two functions are not |
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common. |
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On CVPPC/BVPPC configuration space is accessible at offset +0x0 (but there |
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are also mirrors through whole configuration space). |
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See [[p5pb_pci_conf_read()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_pci_conf_read]] and [[p5pb_pci_conf_write()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_pci_conf_read]] functions. |
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# 2b. PCI I/O registers space (0xFFFC0000) |
# 2b. PCI I/O registers space (0xFFFA0000) |
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This space offers access to I/O registers of all PCI cards. |
This space offers access to I/O registers of all PCI cards. |
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Line 114 On CVPPC/BVPPC this space is present at
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Line 136 On CVPPC/BVPPC this space is present at
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Offset - meaning |
Offset - meaning |
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0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode |
0x0000 - Endianness swapper mode, write 0x02 to switch bridge into |
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big endian mode |
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0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side) |
0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side) |
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Line 138 Differentiating between CVPPC/BVPPC and
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Line 161 Differentiating between CVPPC/BVPPC and
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by looking for Texas Instruments TVP4020 vendor and product ID at the beginning |
by looking for Texas Instruments TVP4020 vendor and product ID at the beginning |
of PCI configuration space. Configuration data for Permedia 2 chip will be |
of PCI configuration space. Configuration data for Permedia 2 chip will be |
available at offset 0x0 on CVPPC/BVPPC, but on G-REX first slot is located |
available at offset 0x0 on CVPPC/BVPPC, but on G-REX first slot is located |
at offset 0x1000. See [[p5pb_identify_bridge()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_identify_bridge]] and [[p5pb_cvppc_probe()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_cvppc_probe]] functions |
at offset 0x1000. See [[p5pb_identify_bridge()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_identify_bridge]] |
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and [[p5pb_cvppc_probe()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_cvppc_probe]] functions |
in the NetBSD driver. |
in the NetBSD driver. |
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# 4. Reconfiguring the bus |
# 4. Reconfiguring the bus |
Line 162 reverse engineering.
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Line 186 reverse engineering.
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[TO BE COMPLETED] |
[TO BE COMPLETED] |
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G-REX 4000D probably has busmaster DMA capability in all slots. |
G-REX 4000D probably has busmaster DMA capability in all slots. G-REX 1200 has |
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busmaster DMA in first or two first slots depending on hardware revision. |
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# 7. Sample PCI bridge driver implementation |
# 7. Sample PCI bridge driver implementation |
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