version 1.2, 2012/07/04 18:24:04
|
version 1.3, 2012/07/06 10:27:32
|
Line 2
|
Line 2
|
|
|
Programming the G-REX PCI bridge |
Programming the G-REX PCI bridge |
|
|
document version 0 - THIS IS A WORK IN PROGRESS! |
document version 0.1 - THIS IS A WORK IN PROGRESS! |
|
|
# 0. Introduction |
# 0. Introduction |
|
|
Line 17 In case you've noticed an error in this
|
Line 17 In case you've noticed an error in this
|
|
|
# 1. Theory of operation |
# 1. Theory of operation |
|
|
G-REX is an evolution of PCI bridge used previously on CyberVisionPPC and BlizzardVisionPPC cards. These |
G-REX is an evolution of PCI bridge used previously on CyberVisionPPC and |
products share a lot of similiarities. |
BlizzardVisionPPC cards. These products share a lot of similiarities (at |
|
least when it comes to PCI interface). |
Firmware does the dirty job of assigning PCI resources (BARs, interrupt lines, etc.) before the OS is running. |
|
Therefore G-REX does not need any special initialization. |
Firmware does the dirty job of assigning PCI resources (BARs, interrupt lines, |
|
etc.) before the OS is running. Therefore G-REX does not need any special |
|
initialization. |
|
|
# 2. Memory map |
# 2. Memory map |
|
|
G-REX is configured as multipie AutoConf boards. Confusingly, they all have the same vendor and product ID. |
G-REX is configured as multipie AutoConf boards. Confusingly, they all have the same vendor (8512) and product (101). |
|
|
0xFFFA0000 - PCI I/O register space, 64KB. |
0xFFFA0000 - PCI I/O register space, 64KB. |
|
|
Line 37 G-REX is configured as multipie AutoConf
|
Line 39 G-REX is configured as multipie AutoConf
|
|
|
# 2a. PCI configuration space |
# 2a. PCI configuration space |
|
|
Access to configuration space is a bit tricky. Be warned that access to addresses not used by G-REX generates bus |
Access to configuration space is a bit tricky. Be warned that access to |
error (esp. to configuration locations which are unused because there is no card in the slot). Depending on how these |
addresses not used by G-REX generates bus error (esp. to configuration |
errors are supported in your OS, it may be important to trap them and handle correctly. |
locations which are unused because there is no card in the slot). Depending on |
|
how these errors are supported in your OS, it may be important to trap them and |
|
handle correctly. |
|
|
Configuration data for first slot seems to be accessible at +0x1000. |
Configuration data for first slot seems to be accessible at +0x1000. |
|
|
Line 49 Configuration data for first slot seems
|
Line 53 Configuration data for first slot seems
|
|
|
This space offers access to I/O registers of all PCI cards. |
This space offers access to I/O registers of all PCI cards. |
|
|
BAR addresses in this space are treated as relative to 0xFFFA0000. Card with I/O BAR set to 0x100 will actually be |
BAR addresses in this space are treated as relative to 0xFFFA0000. Card with |
available at 0xFFFA0100. |
I/O BAR set to 0x100 will actually be available at 0xFFFA0100. |
|
|
# 2c. PCI memory space |
# 2c. PCI memory space |
|
|
This space offers access to memory (and memory-mapped registers) of PCI cards. Each PCI memory BAR is assigned a |
This space offers access to memory (and memory-mapped registers) of PCI cards. |
separate AutoConf board during firmware initialization. |
Each PCI memory BAR is assigned a separate AutoConf board during firmware |
|
initialization. |
|
|
Addresses in this space are treated as absolute. Memory BAR register set to 0x80000000 means it is configured at this |
Addresses in this space are treated as absolute. Memory BAR register set to |
address. |
0x80000000 means it is configured at this address. |
|
|
# 2d. Bridge configuration registers |
# 2d. Bridge configuration registers |
|
|
Offset - meaning |
Offset - meaning |
|
|
0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode |
0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode |
|
|
0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side) |
0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side) |
|
|
No need to fiddle with these registers, as they've been already configured properly by the firmware. |
No need to fiddle with these registers, as they've been already configured properly by the firmware. |
|
|
# 3. Reconfiguring the bus. |
# 3. Reconfiguring the bus. |
|
|
If needed, it's possible to reconfigure bus just by writing new values into configuration space. Keep in mind that any |
If needed, it's possible to reconfigure bus just by writing new values into |
previously initialized chips will need to be reset and initialized again (for example 3Dfx Voodoo 3, which is |
configuration space. Keep in mind that any previously initialized chips will |
|
need to be reset and initialized again (for example 3Dfx Voodoo 3, which is |
initialized by the firmware so it can display early startup menu). |
initialized by the firmware so it can display early startup menu). |
|
|
# 4. Interrupts |
# 4. Interrupts |
|
|
All interrupts are converted into Amiga INT2 interrupt. There's no such thing as interrupt acknowledge register. |
All interrupts are converted into Amiga INT2 interrupt. There's no such thing |
|
as interrupt acknowledge register. |
|
|
# 5. DMA |
# 5. DMA |
|
|
The bridge is certainly capable of DMA, but it needs further reverse engineering. |
The bridge is certainly capable of DMA, but it needs further reverse |
|
engineering. |
|
|
[TO BE COMPLETED] |
[TO BE COMPLETED] |
|
|
There were at least two different revisions of G-REX 1200. Later revision probably does support DMA in all slots. |
There were at least two different revisions of G-REX 1200. Later revision |
|
probably does support DMA in two slots. |
|
|
G-REX 4000D probably has busmaster DMA capability in all slots. |
G-REX 4000D probably has busmaster DMA capability in all slots. |
|
|
# 6. Sample PCI bridge driver implementation |
# 6. Sample PCI bridge driver implementation |
|
|
The NetBSD p5pb driver serves as example driver implementation. It was written using the same knowledge that went |
The NetBSD [[p5pb|http://netbsd.gw.com/cgi-bin/man-cgi?p5pb+4.amiga+NetBSD-current]] |
into this document. |
driver serves as an example driver implementation. It was written using the |
|
same knowledge that went into this document. |
|
|
|
The driver consists of several files in [[src/sys/arch/amiga/pci|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/]] directory. |
|
|
|
p5membar.c - Dummy driver handling AutoConf resources. |
|
p5membarvar.h - Structures used by the p5membar. |
|
p5pb.c - Main driver code. |
|
p5pbreg.h - Inlcude file containing register locations. |
|
p5pbvar.h - Structures used by the p5pb. |
|
|
|
The p5pb does attach on top of p5bus, however p5membar drivers attach on top of zbus (since 8512/101 entries are seen as Zorro boards). |
|
|