Diff for /wikisrc/users/rkujawa/g-rex.mdwn between versions 1.8 and 1.12

version 1.8, 2012/07/08 12:30:39 version 1.12, 2012/07/12 17:04:33
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 Programming the G-REX PCI bridge  Programming the G-REX PCI bridge
   
 document version 0.2 - THIS IS A WORK IN PROGRESS!  document version 0.4
   
 # 0. Introduction  # 0. Introduction
   
Line 73  same vendor (8512) and product (101). Line 73  same vendor (8512) and product (101).
   
 0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed.   0x80000000 - PCI memory space, variable size and number of boards, depending on cards installed. 
   
 # 2a. PCI configuration space (0xFFFA0000)  # 2a. PCI configuration space (0xFFFC0000)
   
 Access to configuration space is a bit tricky. Be warned that access to   Access to configuration space is a bit tricky. Be warned that access to 
 addresses not used by G-REX generates bus error (esp. to configuration   addresses not used by G-REX generates bus error (esp. to configuration 
Line 81  locations which are unused because there Line 81  locations which are unused because there
 how these errors are supported in your OS, it may be important to trap them and  how these errors are supported in your OS, it may be important to trap them and
 handle correctly.   handle correctly. 
   
 Configuration data for first slot seems to be accessible at offset +0x1000 (on   Configuration data for first slot (device 0) is accessible at offset +0x1000, 
 CVPPC/BVPPC there's aslo a mirror on +0x0).  location for the next slots can be obtained by shifting the bit:
   
 [TO BE COMPLETED]  Configuration space address + (offset << device number)
   
   For example to obtain configuration space for the second slot (device 1): 
   
   0xFFFC0000 + (0x1000 << 1) = 0xFFFC2000
   
   For the third slot (device 2): 
   
   0xFFFC0000 + (0x1000 << 2) = 0xFFFC4000
   
   and so on.
   
   How to access device functions is not well analyzed, however funtion 0 is
   always available at address computed by the above equation. Function 1 is
   available at offset +0x100. One could assume that accessing the next
   device functions is possible by shifting the bit (as with device access),
   but that was not tested, becasue cards with more than two functions are not
   common. 
   
   On CVPPC/BVPPC configuration space is accessible at offset +0x0 (but there
   are also mirrors through whole configuration space).
   
   See [[p5pb_pci_conf_read()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_pci_conf_read]] and [[p5pb_pci_conf_write()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_pci_conf_read]] functions. 
   
 # 2b. PCI I/O registers space (0xFFFC0000)  # 2b. PCI I/O registers space (0xFFFA0000)
   
 This space offers access to I/O registers of all PCI cards.  This space offers access to I/O registers of all PCI cards.
   
Line 114  On CVPPC/BVPPC this space is present at  Line 136  On CVPPC/BVPPC this space is present at 
   
 Offset - meaning  Offset - meaning
   
 0x0000 - Endianness swapper mode, write 0x02 to switch bridge into big endian mode  0x0000 - Endianness swapper mode, write 0x02 to switch bridge into 
   big endian mode
   
 0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side)  0x0010 - Interrupt enable, write 0x01 to enable interrupts (INT2 on Amiga side)
   
Line 138  Differentiating between CVPPC/BVPPC and  Line 161  Differentiating between CVPPC/BVPPC and 
 by looking for Texas Instruments TVP4020 vendor and product ID at the beginning  by looking for Texas Instruments TVP4020 vendor and product ID at the beginning
 of PCI configuration space. Configuration data for Permedia 2 chip will be  of PCI configuration space. Configuration data for Permedia 2 chip will be
 available at offset 0x0 on CVPPC/BVPPC, but on G-REX first slot is located  available at offset 0x0 on CVPPC/BVPPC, but on G-REX first slot is located
 at offset 0x1000. See [[p5pb_identify_bridge()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_identify_bridge]] and [[p5pb_cvppc_probe()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_cvppc_probe]] functions  at offset 0x1000. See [[p5pb_identify_bridge()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_identify_bridge]] 
   and [[p5pb_cvppc_probe()|http://nxr.netbsd.org/xref/src/sys/arch/amiga/pci/p5pb.c#p5pb_cvppc_probe]] functions
 in the NetBSD driver.  in the NetBSD driver.
   
 # 4. Reconfiguring the bus  # 4. Reconfiguring the bus
Line 162  reverse engineering. Line 186  reverse engineering.
 [TO BE COMPLETED]  [TO BE COMPLETED]
   
   
 G-REX 4000D probably has busmaster DMA capability in all slots.  G-REX 4000D probably has busmaster DMA capability in all slots. G-REX 1200 has
   busmaster DMA in first or two first slots depending on hardware revision.
   
 # 7. Sample PCI bridge driver implementation  # 7. Sample PCI bridge driver implementation
   
Line 182  The p5pb does attach on top of p5bus, ho Line 207  The p5pb does attach on top of p5bus, ho
   
 # 8. Thanks  # 8. Thanks
   
 [[AmiBay|http://www.amibay.com]] users d0pefish and ramborolf helped testing   [[AmiBay|http://www.amibay.com]] users d0pefish, ramborolf and hese helped 
 early versions of p5pb driver. Without their help this document would not   testing early versions of p5pb driver. Without their help this document would 
 exist.  not exist.
   

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