File:  [NetBSD Developer Wiki] / wikisrc / ports / evbarm / tegra.mdwn
Revision 1.34: download - view: text, annotated - select for diffs
Sat Nov 21 23:35:01 2015 UTC (5 years, 5 months ago) by wiki
Branches: MAIN
CVS tags: HEAD
web commit by jmcneill: update TODO

    1: [[!meta title="NetBSD/evbarm on NVIDIA Tegra"]]
    2: 
    3: The NetBSD tegra port currently supports the NVIDIA Tegra K1 (32-bit) system-on-a-chip. The [NVIDIA Jetson TK1 development kit](https://developer.nvidia.com/jetson-tk1) is a board based on the Tegra K1 SoC.
    4: 
    5: [[!toc levels=2]]
    6: 
    7: # Supported hardware
    8:  - CPU: Cortex-A15: NVIDIA Tegra K1 (T124) (4-core)
    9:    - VFP / NEON
   10:    - CPU frequency scaling
   11:  - GIC
   12:  - ARM generic timer
   13:  - Clock and reset controller
   14:  - GPIO controller
   15:  - MPIO / pinmux controller
   16:  - Memory controller
   17:  - Power management controller
   18:  - I2C controller
   19:  - UART [[!template id=man name="com" section="4"]] serial console
   20:  - RTC
   21:  - Watchdog timer
   22:  - SDMMC [[!template id=man name="sdhc" section="4"]] controller
   23:  - USB 2.0 [[!template id=man name="ehci" section="4"]] controller
   24:  - PCI express
   25:  - SATA [[!template id=man name="ahcisata" section="4"]] controller
   26:  - HDMI
   27:    - Framebuffer console
   28:    - HDMI Audio [[!template id=man name="hdaudio" section="4"]] controller
   29:    - HDMI CEC
   30:  - Jetson TK1
   31:    - On-board Realtek 8111G [[!template id=man name="re" section="4"]] gigabit ethernet 
   32:    - EEPROM [[!template id=man name="seeprom" section="4"]] (on I2C)
   33:    - TMP451 [[!template id=man name="titemp" section="4"]] temperature sensor (on I2C)
   34:    - RF kill switch
   35:    - Power button
   36:  - AS3722 power management unit
   37:  - eFUSE
   38:  - SoC thermal sensors
   39: 
   40: 
   41: # TODO
   42:  - Memory controller SMMU support
   43:  - APB DMA
   44:  - Audio Hub (AHUB)
   45:  - GPU (nouveau)
   46:  - USB 3.0 [[!template id=man name="xhci" section="4"]] controller
   47:  - SPI controller
   48:  - PWM controller
   49:  - PCIe MSI support
   50:  - CL-DVFS
   51:  - LVDS/eDP display output
   52: 
   53: # Generating a boot script
   54: 
   55: [[!template  id=programlisting text="""
   56: $ cat boot.txt
   57: setenv bootargs root=ld1a
   58: fatload mmc 1:1 0x90000000 netbsd.ub
   59: bootm 0x90000000
   60: $ mkubootimage -A arm -C none -O netbsd -T script -a 0 -n "NetBSD/tegra boot" boot.txt boot.scr
   61: """]]
   62: 
   63: # Getting U-Boot
   64: 
   65: Jetson TK1 boards come with Linux4Tegra R19.x installed, which doesn't use U-Boot. The easiest way to get U-Boot is to upgrade to Linux4Tegra R21.x (Linux PC or VM required) following the [quick start guide](http://developer.download.nvidia.com/embedded/L4T/r21_Release_v4.0/l4t_quick_start_guide.txt).
   66: 
   67: # Modesetting
   68: 
   69: ## Console
   70: 
   71: To override the default video mode (auto-detected from display EDID), use the *video* kernel command-line parameter:
   72: 
   73: [[!template  id=programlisting text="""
   74: video=<xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
   75: """]]
   76: 
   77: ## Xorg
   78: 
   79: To be able to use the mode setting features of the Tegra DRM driver, you must use the xf86-video-modesetting driver. Put this in xorg.conf:
   80: 
   81: [[!template  id=programlisting text="""
   82: Section "Device"
   83:     Identifier "DRM Modesetting"
   84:     Driver "modesetting"
   85: EndSection
   86: """]]
   87: 
   88: # dmesg
   89: 
   90: [[!template  id=programlisting text="""
   91: Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
   92:     2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015
   93:     The NetBSD Foundation, Inc.  All rights reserved.
   94: Copyright (c) 1982, 1986, 1989, 1991, 1993
   95:     The Regents of the University of California.  All rights reserved.
   96: 
   97: NetBSD 7.99.21 (JETSONTK1) #258: Thu Nov 12 06:45:09 AST 2015
   98: 	jmcneill@megatron.local:/Users/jmcneill/netbsd/src/sys/arch/evbarm/compile/obj/JETSONTK1
   99: total memory = 2047 MB
  100: avail memory = 2021 MB
  101: sysctl_createv: sysctl_create(machine_arch) returned 17
  102: timecounter: Timecounters tick every 10.000 msec
  103: mainbus0 (root)
  104: cpu0 at mainbus0 core 0: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core)
  105: cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
  106: cpu0: 32KB/64B 2-way L1 PIPT Instruction cache
  107: cpu0: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache
  108: cpu0: 2048KB/64B 16-way write-through L2 PIPT Unified cache
  109: vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
  110: cpu1 at mainbus0 core 1
  111: cpu2 at mainbus0 core 2
  112: cpu3 at mainbus0 core 3
  113: armperiph0 at mainbus0
  114: armgic0 at armperiph0: Generic Interrupt Controller, 192 sources (183 valid)
  115: armgic0: 32 Priorities, 160 SPIs, 7 PPIs, 16 SGIs
  116: armgtmr0 at armperiph0: ARMv7 Generic 64-bit Timer (12000 kHz)
  117: armgtmr0: interrupting on irq 27
  118: timecounter: Timecounter "armgtmr0" frequency 12000000 Hz quality 500
  119: tegraio0 at mainbus0: Tegra K1 (T124)
  120: tegracar0 at tegraio0: CAR
  121: tegracar0: PLLX = 2292000000 Hz
  122: tegracar0: PLLC = 88000000 Hz
  123: tegracar0: PLLE = 292968 Hz
  124: tegracar0: PLLU = 480000000 Hz
  125: tegracar0: PLLP0 = 408000000 Hz
  126: tegracar0: PLLD2 = 594000000 Hz
  127: tegragpio0 at tegraio0: GPIO
  128: gpio0 at tegragpio0 (A): 8 pins
  129: gpio1 at tegragpio0 (B): 8 pins
  130: gpio2 at tegragpio0 (C): 8 pins
  131: gpio3 at tegragpio0 (D): 8 pins
  132: gpio4 at tegragpio0 (E): 8 pins
  133: gpio5 at tegragpio0 (F): 8 pins
  134: gpio6 at tegragpio0 (G): 8 pins
  135: gpio7 at tegragpio0 (H): 8 pins
  136: gpio8 at tegragpio0 (I): 8 pins
  137: gpio9 at tegragpio0 (J): 8 pins
  138: gpio10 at tegragpio0 (K): 8 pins
  139: gpio11 at tegragpio0 (L): 8 pins
  140: gpio12 at tegragpio0 (M): 8 pins
  141: gpio13 at tegragpio0 (N): 8 pins
  142: gpio14 at tegragpio0 (O): 8 pins
  143: gpio15 at tegragpio0 (P): 8 pins
  144: gpio16 at tegragpio0 (Q): 8 pins
  145: gpiobutton0 at gpio16 pins 0: Power button
  146: gpio17 at tegragpio0 (R): 8 pins
  147: gpio18 at tegragpio0 (S): 8 pins
  148: gpio19 at tegragpio0 (T): 8 pins
  149: gpio20 at tegragpio0 (U): 8 pins
  150: gpio21 at tegragpio0 (V): 8 pins
  151: gpio22 at tegragpio0 (W): 8 pins
  152: gpio23 at tegragpio0 (X): 8 pins
  153: gpiorfkill0 at gpio23 pins 7
  154: gpio24 at tegragpio0 (Y): 8 pins
  155: gpio25 at tegragpio0 (Z): 8 pins
  156: gpio26 at tegragpio0 (AA): 8 pins
  157: gpio27 at tegragpio0 (BB): 8 pins
  158: gpio28 at tegragpio0 (CC): 8 pins
  159: gpio29 at tegragpio0 (DD): 8 pins
  160: gpio30 at tegragpio0 (EE): 8 pins
  161: tegratimer0 at tegraio0: Timers
  162: tegratimer0: default watchdog period is 10 seconds
  163: tegramc0 at tegraio0: MC
  164: tegrapmc0 at tegraio0: PMC
  165: tegraxusbpad0 at tegraio0: XUSB PADCTL
  166: tegrampio0 at tegraio0: MPIO
  167: tegrai2c0 at tegraio0 port 0: I2C1
  168: tegrai2c0: interrupting on irq 70
  169: iic0 at tegrai2c0: I2C bus
  170: seeprom0 at iic0 addr 0x56: AT24Cxx or compatible EEPROM: size 256
  171: titemp0 at iic0 addr 0x4c: TMP451
  172: tegrai2c1 at tegraio0 port 1: I2C2
  173: tegrai2c1: interrupting on irq 116
  174: iic1 at tegrai2c1: I2C bus
  175: tegrai2c2 at tegraio0 port 2: I2C3
  176: tegrai2c2: interrupting on irq 124
  177: iic2 at tegrai2c2: I2C bus
  178: tegrai2c3 at tegraio0 port 3: I2C4
  179: tegrai2c3: interrupting on irq 152
  180: iic3 at tegrai2c3: I2C bus
  181: ddc0 at iic3 addr 0x50: DDC
  182: tegrai2c4 at tegraio0 port 4: I2C5
  183: tegrai2c4: interrupting on irq 85
  184: iic4 at tegrai2c4: I2C bus
  185: as3722pmic0 at iic4 addr 0x40: AMS AS3822
  186: com3 at tegraio0 port 3: ns16550a, working fifo
  187: com3: console
  188: tegrartc0 at tegraio0: RTC
  189: sdhc2 at tegraio0 port 2: SDMMC3
  190: sdhc2: interrupting on irq 51
  191: sdhc2: SDHC 4.0, rev 3, 32-bit ADMA2, 204000 kHz, HS SDR50 SDR104 HS200 1.8V 3.0V 3.3V, re-tuning mode 1, 4096 byte blocks
  192: sdmmc2 at sdhc2 slot 0
  193: sdhc3 at tegraio0 port 3: SDMMC4
  194: sdhc3: interrupting on irq 63
  195: sdhc3: SDHC 4.0, rev 3, 32-bit ADMA2, 204000 kHz, HS SDR50 SDR104 HS200 1.8V 3.0V 3.3V, re-tuning mode 1, 4096 byte blocks
  196: sdmmc3 at sdhc3 slot 0
  197: ahcisata0 at tegraio0: SATA
  198: ahcisata0: interrupting on irq 55
  199: ahcisata0: AHCI revision 1.31, 2 ports, 32 slots, CAP 0xe620ff01<PSC,SSC,PMD,ISS=0x2=Gen2,SAL,SALP,SSNTF,SNCQ,S64A>
  200: atabus0 at ahcisata0 channel 0
  201: hdaudio0 at tegraio0: HDA
  202: hdaudio0: interrupting on irq 113
  203: hdafg0 at hdaudio0: NVIDIA Tegra124 HDMI
  204: hdafg0: HDMI00 8ch: Digital Out [Jack]
  205: hdafg0: 8ch/0ch 44100Hz PCM16*
  206: audio0 at hdafg0: full duplex, playback, capture, mmap, independent
  207: tegracec0 at tegraio0: HDMI CEC
  208: tegracec0: interrupting on irq 35
  209: hdmicec0 at tegracec0
  210: tegrausbphy0 at tegraio0 port 0: USB PHY1
  211: ehci0 at tegraio0 port 0: USB1
  212: ehci0: interrupting on irq 52
  213: ehci0: EHCI version 1.10
  214: ehci0: switching to host mode
  215: usb0 at ehci0: USB revision 2.0
  216: tegrausbphy1 at tegraio0 port 1: USB PHY2
  217: ehci1 at tegraio0 port 1: USB2
  218: ehci1: interrupting on irq 53
  219: ehci1: EHCI version 1.10
  220: ehci1: switching to host mode
  221: usb1 at ehci1: USB revision 2.0
  222: tegrausbphy2 at tegraio0 port 2: USB PHY3
  223: ehci2 at tegraio0 port 2: USB3
  224: ehci2: interrupting on irq 129
  225: ehci2: EHCI version 1.10
  226: ehci2: switching to host mode
  227: usb2 at ehci2: USB revision 2.0
  228: tegrahost1x0 at tegraio0: HOST1X
  229: tegradrm0 at tegraio0
  230: drm: Supports vblank timestamp caching Rev 2 (21.10.2013).
  231: drm: No driver support for vblank timestamp query.
  232: tegrafb0 at tegradrm0
  233: tegrafb0: framebuffer at 0x9ab00000, size 1280x720, depth 32, stride 5120
  234: wsdisplay0 at tegrafb0 kbdmux 1
  235: wsmux1: connecting to wsdisplay0
  236: wsdisplay0: screen 0-3 added (default, vt100 emulation)
  237: tegradrm0: info: registered panic notifier
  238: tegradrm0: initialized tegra 0.1.0 20151108 on minor 0
  239: tegrapcie0 at tegraio0: PCIE
  240: tegrapcie0: interrupting on irq 130
  241: pci0 at tegrapcie0 bus 0
  242: pci0: memory space enabled, rd/line, rd/mult, wr/inv ok
  243: ppb0 at pci0 dev 0 function 0: vendor 10de product 0e12 (rev. 0xa1)
  244: ppb0: PCI Express capability version 2 <Root Port of PCI-E Root Complex> x2 @ 5.0GT/s
  245: ppb0: link is x1 @ 2.5GT/s
  246: pci1 at ppb0 bus 1
  247: pci1: memory space enabled, rd/line, wr/inv ok
  248: athn0 at pci1 dev 0 function 0athn0: Atheros AR9285
  249: athn0: rev 2 (1T1R), ROM rev 13, address 00:17:c4:d7:d0:58
  250: athn0: interrupting at irq 130
  251: athn0: 11b rates: 1Mbps 2Mbps 5.5Mbps 11Mbps
  252: athn0: 11g rates: 1Mbps 2Mbps 5.5Mbps 11Mbps 6Mbps 9Mbps 12Mbps 18Mbps 24Mbps 36Mbps 48Mbps 54Mbps
  253: ppb1 at pci0 dev 1 function 0: vendor 10de product 0e13 (rev. 0xa1)
  254: ppb1: PCI Express capability version 2 <Root Port of PCI-E Root Complex> x1 @ 5.0GT/s
  255: ppb1: link is x1 @ 2.5GT/s
  256: pci2 at ppb1 bus 2
  257: pci2: memory space enabled, rd/line, wr/inv ok
  258: re0 at pci2 dev 0 function 0: RealTek 8168/8111 PCIe Gigabit Ethernet (rev. 0x0c)
  259: re0: interrupting at irq 130
  260: re0: Ethernet address 00:04:4b:2f:51:a2
  261: re0: using 512 tx descriptors
  262: rgephy0 at re0 phy 7: RTL8251 1000BASE-T media interface, rev. 0
  263: rgephy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT-FDX, auto
  264: timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
  265: cpu2: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core)
  266: cpu2: DC enabled IC enabled WB disabled EABT branch prediction enabled
  267: cpu2: 32KB/64B 2-way L1 PIPT Instruction cache
  268: cpu2: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache
  269: cpu2: 2048KB/64B 16-way write-through L2 PIPT Unified cache
  270: vfp2 at cpu2: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
  271: cpu1: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core)
  272: cpu1: DC enabled IC enabled WB disabled EABT branch prediction enabled
  273: cpu1: 32KB/64B 2-way L1 PIPT Instruction cache
  274: cpu1: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache
  275: cpu1: 2048KB/64B 16-way write-through L2 PIPT Unified cache
  276: vfp1 at cpu1: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
  277: cpu3: 2292 MHz Cortex-A15 r3p3 (Cortex V7A core)
  278: cpu3: DC enabled IC enabled WB disabled EABT branch prediction enabled
  279: cpu3: 32KB/64B 2-way L1 PIPT Instruction cache
  280: cpu3: 32KB/64B 2-way write-back-locking-C L1 PIPT Data cache
  281: cpu3: 2048KB/64B 16-way write-through L2 PIPT Unified cache
  282: vfp3 at cpu3: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
  283: uhub0 at usb0: Tegra EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
  284: uhub0: 1 port with 1 removable, self powered
  285: uhub1 at usb1: Tegra EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
  286: uhub1: 1 port with 1 removable, self powered
  287: uhub2 at usb2: Tegra EHCI root hub, class 9/0, rev 2.00/1.00, addr 1
  288: uhub2: 1 port with 1 removable, self powered
  289: sdhc3: cmd timeout error
  290: IPsec: Initialized Security Association Processing.
  291: ahcisata0 port 0: device present, speed: 3.0Gb/s
  292: ld0 at sdmmc3: <0x45:0x0100:SEM16G:0x00:0x0301ff34:0x000>
  293: ld0: 15028 MB, 7633 cyl, 64 head, 63 sec, 512 bytes/sect x 30777344 sectors
  294: ld0: GPT GUID: a81e231f-7b1c-c564-1473-5ac55e4b7963
  295: dk0 at ld0: "APP", 29360128 blocks at 94208, type: <unknown>
  296: ld1 at sdmmc2: <0x27:0x5048:SD64G:0x30:0x01ce4def:0x0dc>
  297: dk1 at ld0: "DTB", 8192 blocks at 29454336, type: <unknown>
  298: dk2 at ld0: "EFI", 131072 blocks at 29462528, type: <unknown>
  299: dk3 at ld0: "USP", 8192 blocks at 29593600, type: <unknown>
  300: dk4 at ld0: "TP1", 8192 blocks at 29601792, type: <unknown>
  301: dk5 at ld0: "TP2", 8192 blocks at 29609984, type: <unknown>
  302: dk6 at ld0: "TP3", 8192 blocks at 29618176, type: <unknown>
  303: dk7 at ld0: "WB0", 4096 blocks at 29626368, type: <unknown>
  304: dk8 at ld0: "UDA", 1142784 blocks at 29630464, type: <unknown>
  305: ld0: 8-bit width, HS200, 200.000 MHz
  306: ld1: 59504 MB, 7585 cyl, 255 head, 63 sec, 512 bytes/sect x 121864192 sectors
  307: ld1: 4-bit width, SDR104, 204.000 MHz
  308: wd0 at atabus0 drive 0
  309: wd0: <OCZ-AGILITY3>
  310: wd0: drive supports 16-sector PIO transfers, LBA48 addressing
  311: wd0: 111 GB, 232581 cyl, 16 head, 63 sec, 512 bytes/sect x 234441648 sectors
  312: wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133)
  313: wd0(ahcisata0:0:0): using PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133) (using DMA)
  314: uhidev0 at uhub2 port 1 configuration 1 interface 0
  315: uhidev0: Logitech USB Receiver, rev 2.00/29.00, addr 2, iclass 3/1
  316: ukbd0 at uhidev0: 8 modifier keys, 6 key codes
  317: wskbd0 at ukbd0 mux 1
  318: wskbd0: connecting to wsdisplay0
  319: uhidev1 at uhub2 port 1 configuration 1 interface 1
  320: uhidev1: Logitech USB Receiver, rev 2.00/29.00, addr 2, iclass 3/1
  321: uhidev1: 17 report ids
  322: ums0 at uhidev1 reportid 2: 16 buttons, W and Z dirs
  323: wsmouse0 at ums0 mux 0
  324: uhid0 at uhidev1 reportid 3: input=4, output=0, feature=0
  325: uhid1 at uhidev1 reportid 4: input=1, output=0, feature=0
  326: uhid2 at uhidev1 reportid 16: input=6, output=6, feature=0
  327: uhid3 at uhidev1 reportid 17: input=19, output=19, feature=0
  328: boot device: wd0
  329: root on wd0a dumps on wd0b
  330: root file system type: ffs
  331: kern.module.path=/stand/evbarm/7.99.21/modules
  332: WARNING: preposterous TOD clock time
  333: WARNING: using filesystem time
  334: WARNING: CHECK AND RESET THE DATE!
  335: """]]
  336: 
  337: # Links
  338: 
  339: - [NVIDIA Jetson TK1 development kit](https://developer.nvidia.com/jetson-tk1)
  340: - [Hardware documentation](https://developer.nvidia.com/hardware-design-and-development)
  341: - [Linux For Tegra](https://developer.nvidia.com/linux-tegra)

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