File:  [NetBSD Developer Wiki] / wikisrc / ports / evbarm / beaglebone.mdwn
Revision 1.2: download - view: text, annotated - select for diffs
Mon Jan 7 16:33:36 2013 UTC (8 years, 5 months ago) by jakllsch
Branches: MAIN
CVS tags: HEAD
Update BeagleBone status.

    1: [[!meta title="NetBSD/evbarm on BeagleBone"]]
    2: 
    3: This page attempts to document and coordinate efforts towards NetBSD on [BeagleBone](http://beagleboard.org/bone).
    4: 
    5: # What works
    6:  - Boots multi-user on [[!template id=man name="ld" section="4"]] @ [[!template id=man name="sdmmc" section="4"]] root and [[!template id=man name="com" section="4"]] console.
    7:  - Ethernet ([[!template id=man name="cpsw" section="4" arch="evbarm"]])
    8: 
    9: # What needs work
   10:  - EDMA3 (perhaps at first for [[!template id=man name="sdhc" section="4"]])
   11:  - USB (host)
   12:  - SPI
   13:  - I²C
   14:  - GPIO
   15:  - Framebuffer/graphics with LCD or DVI/HDMI capes
   16:  - Touchscreens on LCD capes
   17:  - USB (device)
   18: 
   19: # Sample dmesg
   20: [[!template id=filecontent name="dmesg" text="""
   21: NetBSD 6.99.16 (BEAGLEBONE)
   22: total memory = 256 MB
   23: avail memory = 247 MB
   24: timecounter: Timecounters tick every 10.000 msec
   25: cprng kernel: WARNING insufficient entropy at creation.
   26: mainbus0 (root)
   27: cpu0 at mainbus0 core 0: 720 MHz Cortex-A8 r3p2 (Cortex core)
   28: cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
   29: cpu0: isar: [0]=0x101111 [1]=0x13112111 [2]=0x21232031 [3]=0x11112131, [4]=0x11142, [5]=0
   30: cpu0: mmfr: [0]=0x1100003 [1]=0x20000000 [2]=0x1202000 [3]=0x211
   31: cpu0: pfr: [0]=0x1131 [1]=0x11
   32: cpu0: 32KB/64B 4-way L1 Instruction cache
   33: cpu0: 32KB/64B 4-way write-back-locking-C L1 Data cache
   34: cpu0: 256KB/64B 8-way write-through L2 Unified cache
   35: vfp0 at cpu0: NEON MPE (VFP 3.0+)
   36: obio0 at mainbus0 base 0x44000000-0x4fffffff: On-Board IO
   37: omapicu0 at obio0 addr 0x48200000-0x48200fff intrbase 0
   38: prcm0 at obio0 addr 0x44e00000-0x44e01fff: Power, Reset and Clock Management
   39: gpmc0 at mainbus0 base 0x50000000-0x50ffffff: General Purpose Memory Controller, rev 6.0
   40: gpmc0: CS#0 valid, addr 0x08000000, size 256MB
   41: com0 at obio0 addr 0x44e09000-0x44e09fff intr 72: ns16550a, working fifo
   42: com0: console
   43: sdhc0 at obio0 addr 0x48060100-0x48060fff intr 64: SDHC controller
   44: sdhc0: SD Host Specification 2.0, rev.49
   45: sdmmc0 at sdhc0 slot 0
   46: omapdmtimer0 at obio0 addr 0x48040000-0x48040fff intr 68: DMTIMER2
   47: omapdmtimer1 at obio0 addr 0x44e31000-0x44e31fff intr 67: DMTIMER1ms
   48: omapdmtimer2 at obio0 addr 0x48044000-0x48044fff intr 92: DMTIMER4
   49: omapwdt32k0 at obio0 addr 0x44e35000-0x44e35fff: rev 0.1
   50: timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
   51: timecounter: Timecounter "dmtimer" frequency 24000000 Hz quality 100
   52: ld0 at sdmmc0: <0x28:0x4245:31676:0x10::0x0a7>
   53: ld0: 490 MB, 995 cyl, 16 head, 63 sec, 512 bytes/sect x 1003520 sectors
   54: ld0: 4-bit width, bus clock 50.000 MHz
   55: cprng sysctl: WARNING insufficient entropy at creation.
   56: boot device: <unknown>
   57: root on ld0f dumps on ld0b
   58: WARNING: no TOD clock present
   59: WARNING: using filesystem time
   60: WARNING: CHECK AND RESET THE DATE!
   61: init: copying out path `/sbin/init' 11
   62: """]]

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