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Diff for /wikisrc/ports/evbarm/beaglebone.mdwn between versions 1.5 and 1.14

version 1.5, 2013/11/20 14:35:03 version 1.14, 2015/11/02 10:43:47
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 [[!meta title="NetBSD/evbarm on BeagleBone"]]  [[!meta title="NetBSD/evbarm on BeagleBone and BeagleBone Black"]]
   
 [[images/beaglebone.jpg]]  [[images/beaglebone.jpg]]
   
 This page attempts to document and coordinate efforts towards NetBSD on [BeagleBone](http://beagleboard.org/bone).  This page attempts to document and coordinate efforts towards NetBSD on [BeagleBone](http://beagleboard.org/bone) and [BeagleBone Black](http://beagleboard.org/black).
   
 (BeagleBone [image](http://www.flickr.com/photos/sparkfun/8267577194/) by SparkFun Electronics used under CC-By-2.0 license)  (BeagleBone [image](http://www.flickr.com/photos/sparkfun/8267577194/) by SparkFun Electronics used under CC-By-2.0 license)
   
 # What works  [[!toc levels=2]]
   
   # Supported hardware
  - Boots multi-user on [[!template id=man name="ld" section="4"]] @ [[!template id=man name="sdmmc" section="4"]] root and [[!template id=man name="com" section="4"]] console.   - Boots multi-user on [[!template id=man name="ld" section="4"]] @ [[!template id=man name="sdmmc" section="4"]] root and [[!template id=man name="com" section="4"]] console.
  - Ethernet ([[!template id=man name="cpsw" section="4" arch="evbarm"]])   - Ethernet ([[!template id=man name="cpsw" section="4" arch="evbarm"]])
    - SD/MMC controller (SD card and eMMC)
 # What needs work   - EDMA3 (for [[!template id=man name="sdhc" section="4"]])
  - EDMA3 (perhaps at first for [[!template id=man name="sdhc" section="4"]])  
  - USB (host)   - USB (host)
  - SPI  
  - I²C   - I²C
  - GPIO   - CPU frequency scaling (various speeds between 300MHz and 1GHz)
    - Random number generator [[!template id=man name="trng" section="4"]]
    - GPIO (<i>-current since Nov 1, 2015</i>)
   
   # TODO
    - SPI
    - eMMC 8-bit mode
  - Framebuffer/graphics with LCD or DVI/HDMI capes   - Framebuffer/graphics with LCD or DVI/HDMI capes
  - Touchscreens on LCD capes   - Touchscreens on LCD capes
  - USB (device)   - USB (device)
   
   # BeagleBone Black User LEDs
   
   The four blue user LEDs on the BeagleBone Black are wired to GPIO1_21 through GPIO1_24. To control the LEDs from userland, set **gpio=YES** in rc.conf and add this to */etc/gpio.conf*:
   
   [[!template  id=programlisting text="""
   gpio1 21 set out USR0
   gpio1 22 set out USR1
   gpio1 23 set out USR2
   gpio1 24 set out USR3
   """]]
   
   After rebooting, the LED states can be controlled with [[!template id=man name="gpioctl" section="8"]].
   
   [[!template  id=programlisting text="""
   # turn the USR0 light on
   gpioctl gpio1 USR0 on
   
   # turn the USR0 light off
   gpioctl gpio1 USR0 off
   
   # toggle the USR0 light state
   gpioctl gpio1 USR0 toggle
   """]]
   
   
 # Sample dmesg  # Sample dmesg
 [[!template id=filecontent name="dmesg" text="""  [[!template id=filecontent name="dmesg" text="""
 NetBSD 6.99.16 (BEAGLEBONE)  NetBSD 7.99.9 (BEAGLEBONE) #2: Tue Apr 14 20:24:09 ADT 2015
 total memory = 256 MB          Jared@Jared-PC:/cygdrive/d/netbsd/src/sys/arch/evbarm/compile/obj/BEAGLEBONE
 avail memory = 247 MB  total memory = 512 MB
   avail memory = 503 MB
   sysctl_createv: sysctl_create(machine_arch) returned 17
 timecounter: Timecounters tick every 10.000 msec  timecounter: Timecounters tick every 10.000 msec
 cprng kernel: WARNING insufficient entropy at creation.  
 mainbus0 (root)  mainbus0 (root)
 cpu0 at mainbus0 core 0: 720 MHz Cortex-A8 r3p2 (Cortex core)  cpu0 at mainbus0 core 0: 550 MHz Cortex-A8 r3p2 (Cortex V7A core)
 cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled  cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
 cpu0: isar: [0]=0x101111 [1]=0x13112111 [2]=0x21232031 [3]=0x11112131, [4]=0x11142, [5]=0  cpu0: isar: [0]=0x101111 [1]=0x13112111 [2]=0x21232031 [3]=0x11112131, [4]=0x11142, [5]=0
 cpu0: mmfr: [0]=0x1100003 [1]=0x20000000 [2]=0x1202000 [3]=0x211  cpu0: mmfr: [0]=0x1100003 [1]=0x20000000 [2]=0x1202000 [3]=0x211
 cpu0: pfr: [0]=0x1131 [1]=0x11  cpu0: pfr: [0]=0x1131 [1]=0x11
 cpu0: 32KB/64B 4-way L1 Instruction cache  cpu0: 32KB/64B 4-way L1 VIPT Instruction cache
 cpu0: 32KB/64B 4-way write-back-locking-C L1 Data cache  cpu0: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
 cpu0: 256KB/64B 8-way write-through L2 Unified cache  cpu0: 256KB/64B 8-way write-through L2 PIPT Unified cache
 vfp0 at cpu0: NEON MPE (VFP 3.0+)  vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
   vfp0: mvfr: [0]=0x11110222 [1]=0x11111
 obio0 at mainbus0 base 0x44000000-0x4fffffff: On-Board IO  obio0 at mainbus0 base 0x44000000-0x4fffffff: On-Board IO
 omapicu0 at obio0 addr 0x48200000-0x48200fff intrbase 0  omapicu0 at obio0 addr 0x48200000-0x48200fff intrbase 0
 prcm0 at obio0 addr 0x44e00000-0x44e01fff: Power, Reset and Clock Management  prcm0 at obio0 addr 0x44e00000-0x44e01fff: Power, Reset and Clock Management
 gpmc0 at mainbus0 base 0x50000000-0x50ffffff: General Purpose Memory Controller, rev 6.0  sitaracm0 at obio0 addr 0x44e10000-0x44e11fff: control module, rev 1.0
   edma0 at obio0 addr 0x49000000-0x490fffff intrbase 12
   gpmc0 at mainbus0 base 0x50000000: General Purpose Memory Controller, rev 6.0
 gpmc0: CS#0 valid, addr 0x08000000, size 256MB  gpmc0: CS#0 valid, addr 0x08000000, size 256MB
 com0 at obio0 addr 0x44e09000-0x44e09fff intr 72: ns16550a, working fifo  com0 at obio0 addr 0x44e09000-0x44e09fff intr 72: ns16550a, working fifo
 com0: console  com0: console
 sdhc0 at obio0 addr 0x48060100-0x48060fff intr 64: SDHC controller  sdhc0 at obio0 addr 0x48060100-0x48060fff intr 64: SDHC controller (EDMA)
 sdhc0: SD Host Specification 2.0, rev.49  sdhc0: SD Host Specification 2.0, rev.49
   sdhc0: using DMA transfer
 sdmmc0 at sdhc0 slot 0  sdmmc0 at sdhc0 slot 0
   sdhc1 at obio0 addr 0x481d8100-0x481d8fff intr 28: SDHC controller (EDMA)
   sdhc1: SD Host Specification 2.0, rev.49
   sdhc1: using DMA transfer
   sdmmc1 at sdhc1 slot 0
   tiiic0 at obio0 addr 0x44e0b000-0x44e0bfff intr 70: rev 0.11
   iic0 at tiiic0: I2C bus
   seeprom0 at iic0 addr 0x50: AT24Cxx or compatible EEPROM: size 32768
   tps65217pmic0 at iic0 addr 0x24: TPS65217C Power Management Multi-Channel IC (rev 1.2)
   tps65217pmic0: power sources USB max 1300 mA, [AC] max 2500 mA
   tps65217pmic0: [LDO1: 1800 mV] [LDO2: 3300 mV] [LDO3: 1800 mV] [LDO4: 3300 mV] [DCDC1: 1500 mV] [DCDC2: 1325 mV] [DCDC3: 1100 mV]
 omapdmtimer0 at obio0 addr 0x48040000-0x48040fff intr 68: DMTIMER2  omapdmtimer0 at obio0 addr 0x48040000-0x48040fff intr 68: DMTIMER2
 omapdmtimer1 at obio0 addr 0x44e31000-0x44e31fff intr 67: DMTIMER1ms  omapdmtimer1 at obio0 addr 0x44e31000-0x44e31fff intr 67: DMTIMER1ms
 omapdmtimer2 at obio0 addr 0x48044000-0x48044fff intr 92: DMTIMER4  omapdmtimer2 at obio0 addr 0x48044000-0x48044fff intr 92: DMTIMER4
 omapwdt32k0 at obio0 addr 0x44e35000-0x44e35fff: rev 0.1  omapwdt32k0 at obio0 addr 0x44e35000-0x44e35fff: rev 0.1
   tiotg0 at obio0 addr 0x47400000-0x47404fff intrbase 17: TI dual-port USB controller: version v1.0.0.13
   motg0 at tiotg0 port 0: 0x4ea20800 version v0.0.0
   motg1 at tiotg0 port 1: 0x4ea20800 version v0.0.0
   motg1: Dynamic FIFO sizing detected, assuming 16Kbytes of FIFO RAM
   usb0 at motg1: USB revision 2.0
   cpsw0 at obio0 addr 0x4a100000-0x4a107fff intrbase 40: TI CPSW Ethernet
   cpsw0: Ethernet address 90:59:af:5c:d0:94
   ukphy0 at cpsw0 phy 0: OUI 0x00800f, model 0x000f, rev. 1
   ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
 timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0  timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
 timecounter: Timecounter "dmtimer" frequency 24000000 Hz quality 100  timecounter: Timecounter "dmtimer" frequency 24000000 Hz quality 100
 ld0 at sdmmc0: <0x28:0x4245:31676:0x10::0x0a7>  uhub0 at usb0: Mentor Graphics MOTG root hub, class 9/0, rev 1.00/1.00, addr 1
 ld0: 490 MB, 995 cyl, 16 head, 63 sec, 512 bytes/sect x 1003520 sectors  uhub0: 1 port with 1 removable, self powered
 ld0: 4-bit width, bus clock 50.000 MHz  sdmmc0: couldn't enable card: 60
 cprng sysctl: WARNING insufficient entropy at creation.  ld1 at sdmmc1: <0xfe:0x014e:MMC02G:0x00:0x1aee3308:0x000>
 boot device: <unknown>  ld1: 1832 MB, 930 cyl, 64 head, 63 sec, 512 bytes/sect x 3751936 sectors
 root on ld0f dumps on ld0b  ld1: 4-bit width, bus clock 52.000 MHz
 WARNING: no TOD clock present  boot device: ld1
 WARNING: using filesystem time  root on ld1a dumps on ld1b
 WARNING: CHECK AND RESET THE DATE!  root file system type: ffs
 init: copying out path `/sbin/init' 11  kern.module.path=/stand/evbarm/7.99.9/modules
 """]]  """]]
   
   
  - Growing the root file-system  
    - During the partitioning process, do not delete or format the  
      first MSDOS (FAT) partition, as the Raspberry pi firmware is  
      hard coded to boot on the SDCAD / 1st MSDOS partition / Firmware  
      updates and boot loader.  
    - Reboot, and at the prompt to enter the passname of shell, press  
            return for the default (/bin/sh).  
    - At the # prompt, type  
   
         "disklabel -i ld0" and press return.  
    - At the partition> prompt type "A" and press return.  
   
            Adjust disklabel sector from 4194304 to 62333952 [n]?  
            Type "y" and press return.  
    - partition> prompt type "a" and press return.  
   
            Filesystem type prompt, press return to use the current value (4.2BSD).  
            Start offset prompt, press return to use the current value.  
            Partition size prompt, type "$" and press return to grow the  
            partition to use all available free space.  
    - partition> prompt type "W" to save the changes to the disklabel.  
   
            Confirm this choice by typing "y" at the Label disk prompt.  
            Type "Q" and press return to quit disklabel.  
    - At the # prompt (shell), type  
   
            fsck -fy /dev/rld0a  
            resize_ffs -y /dev/rld0a  
    - This may take a few minutes, be patient!  
   
            fsck -fy /dev/rld0a  
            mount_msdos /dev/ld0e /boot  
            reboot  
     - When the system comes back up, the root file-system will have been expanded to  
            fill the SD card.  
Removed from v.1.5  
changed lines
  Added in v.1.14

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