1: [[!template id=port
2: port="evbarm"
3: port_alt="arm"
4: port_var1="earm"
5: port_var2="earmeb"
6: port_var3="earmv6hf"
7: port_var4="earmv7hf"
8: port_var5="earmv7hfeb"
9: port_var_install_notes="evbarm-earm"
10: cur_rel="8.0"
11: future_rel="9.0"
12: changes_cur="8.0"
13: changes_future="9.0"
14: thumbnail="http://www.netbsd.org/images/ports/evbarm/adi_brh.gif"
15: about="""
16: NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping
17: boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also
18: supports some specific embedded system products based on prototype board
19: designs.
20:
21: Matt Thomas is the maintainer of NetBSD/evbarm.
22:
23: ### CPU types
24:
25: The evbarm port can be built with a variety of CPU options. There are
26: three main variables: the instruction set, the endianness, and whether
27: there is hardware floating point. By default the CPU type is "earm",
28: and this implies little endian (el when explicitly stated), and soft
29: (emulated) floating point. Another example, suitable for Raspberry PI
30: 2, is earmv7hf, which is the v7 instruction set, little endian,
31: and hardware floating point.
32:
33: Typically, various boards are best compiled with a CPU type that
34: matches the board's CPU and floating point support, but generally a
35: lower CPU instruction set version is workable on a newer board. See
36: build.sh and look for aliases for the evbarm port.
37:
38: ### Kernels and userland
39:
40: The evbarm userland can be used on any system that can run code of the
41: CPU type used for the build. Typically, a particular board requires a
42: kernel for that board.
43:
44: ### Board specific information
45: - [[Allwinner sunxi family SoCs|Allwinner]]
46: - [[BeagleBone and BeagleBone Black|BeagleBone]]
47: - [[NVIDIA Tegra|Tegra]]
48: - [[ODROID C1 and C1+|ODROID-C1]]
49: - [[Raspberry Pi 1, 2 and 3|Raspberry Pi]]
50:
51: """
52:
53: supported_hardware="""
54:
55: **NOTE**: This list is incomplete. For a full list of configurations, please see the [evbarm kernel configs](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/evbarm/conf/) directory in CVS.
56:
57: [[!toc startlevel=3]]
58:
59: ### ADI Engineering **BRH** ("Big Red Head")
60:
61: The BRH is an evaluation and development platform for the Intel **i80200**
62: XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion
63: Chip"). The BRH is capable of both big- and little-endian operation, although
64: NetBSD currently only supports little-endian operation.
65:
66: Support for the BRH was written by Jason Thorpe, and contributed by Wasabi
67: Systems, Inc.
68:
69: * On-board NS16550-compatible serial ports (_com_)
70: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
71: * On-chip timer on the BECC (used as system clock)
72: * Other devices inserted into the PCI slot
73:
74: The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are
75: limited to 64M due to the layout of the PCI DMA windows. Users of these
76: systems should obtain an FPGA upgrade from ADI to revision 8 or later of the
77: BECC.
78:
79: ### Allwinner Technology
80: Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31.
81:
82: ### Arcom **Viper**
83:
84: The Arcom Viper is a single board computer based on the PXA255 XScale
85: processor.
86:
87: Support for the Arcom Viper was written by Antti Kantee.
88:
89: * On-chip timers (_saost_ used as system clock)
90: * On-chip serial ports (_com_)
91: * On-board SMC91C111 ethernet (_sm_)
92:
93: ### ARM, Ltd. **Integrator**
94:
95: The Integrator/AP is an ATX form-factor board that is used for development of
96: ARM processor-based designs. It supports up to four processors on plug-in core
97: modules, and provides clocks, a bus interface, and interrupt support. The
98: Integrator/AP also supports logic modules which provide additional
99: peripherals, and can accommodate up to three PCI expansion cards. The
100: Integrator/AP can also be inserted into a CompactPCI backplane.
101:
102: Support for the Integrator was written by Richard Earnshaw, and contributed by
103: ARM, Ltd.
104:
105: * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_)
106: * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_)
107: * PrimeCell PL181 MultiMedia Card Interface
108: * Other devices inserted into the PCI expansion slots
109:
110: ### Atmark Techno **Armadillo-9**
111:
112: The Armadillo-9 is a single board computer based on the EP9315 processor.
113:
114: Support for the Armadillo-9 was written by Katsuomi Hamajima.
115:
116: * On-CPU RS232 UARTs (2) (_epcom_)
117: * On-CPU 10/100 Ethernet MAC (_epe_)
118: * system clock from on-CPU timers (_epclk_)
119: * CompactFlash socket (_eppcic_)
120: * USB 1.1 ports (_ohci_)
121:
122: ### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM**
123: The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org.
124:
125: ### BeagleBoard.org **BeagleBone** and **BeagleBone Black**
126: The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org.
127:
128: ### Gumstix, Inc. **gumstix**
129:
130: The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard
131: based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now.
132:
133: Support for the gumstix was written by KIYOHARA Takashi.
134:
135: * basix
136: * cfstix
137: * etherstix
138: * netCF
139: * netDUO
140: * netDUO-mmc
141: * netMMC
142:
143: When booting, it is necessary to set these with u-boot dynamically.
144:
145: <pre> > go 0xa0200000 busheader=basix</pre>
146:
147: * audiostix
148: * console-st (waysmall - STUART)
149: * console-hw (waysmall)
150: * GPSstix (GPS not test)
151: * tweener
152:
153: ### Hardkernel ODROID-C1 and ODROID-C1+
154:
155: The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd.
156:
157: ### Intel **DBPXA250** ("Lubbock")
158:
159: DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the
160: Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm).
161:
162: Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed
163: by Genetec Corp.
164:
165: * On-chip timers (_saost_ used as system clock)
166: * On-chip 2 serial port (_com_)
167: * On-board SMC91C96 ethernet (_sm_)
168: * On-board SA-1111 StrongArm companion chip (_sacc_)
169: * PS/2 keyboard (_pckbd_)
170: * 640x480 LCD (_lcd_)
171: * PCMCIA and CF card slots
172:
173: ### Intel **IQ31244**
174:
175: The IQ31244 is a development platform for the Intel **IOP321** I/O Processor
176: chipset and the Intel **i31244** SATA controller.
177:
178: Initial support for the IQ31244 was written by Jason Thorpe, and contributed
179: by Wasabi Systems, Inc.
180:
181: * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_)
182: * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_)
183: * On-board NS16550-compatible serial port (_com_)
184: * On-chip timers (TMR0 used as system clock)
185: * On-chip Application Accelerator Unit (_iopaau_)
186: * On-chip watchdog timer (_iopwdog_)
187: * On-board compact flash reader (_wdc_)
188: * Other devices inserted into the PCI-X expansion slot
189:
190: ### Intel **IQ80310**
191:
192: The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor
193: chipset, which is comprised of the i80200 XScale processor and the i80312 I/O
194: Companion chip.
195:
196: Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and
197: contributed by Wasabi Systems, Inc.
198:
199: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
200: * On-board timer in the CPLD (used as system clock)
201: * On-board NS16550-compatible serial ports (_com_)
202: * Other devices inserted into the PCI expansion slots
203:
204: ### Intel **IQ80321**
205:
206: The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor
207: (i80321 XScale processor).
208:
209: Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi
210: Systems, Inc.
211:
212: * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_)
213: * On-board NS16550-compatible serial port (_com_)
214: * On-chip timers (TMR0 used as system clock)
215: * On-chip Application Accelerator Unit (_iopaau_)
216: * On-chip watchdog timer (_iopwdog_)
217: * Other devices inserted into the PCI-X expansion slots
218:
219: ### Intel **IXM1200**
220:
221: The IXM1200 is the reference platform for the Intel **IXP1200** Network
222: Processor.
223:
224: Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki.
225:
226: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
227: * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_)
228: * On-chip timers (ixpclk0 used as system clock)
229: * On-chip serial port (_ixpcom_)
230:
231: ### NOVATEC **NTNP425B** ("ZAO425")
232:
233: NTNP425B is an evaluation and development platform for the Intel **IXP425**
234: XScale Core NetworkProcessor. NTNP425B is based on the reference board of
235: Intel **IXDP425**. The **NTNP425B** is capable of only big-endian operation.
236: Since the library for micro-engine(NPE) offered from Intel Corp. is big-
237: endian. More information about the **NTNP425B** can be found on [product
238: catalogue of **NTNP425B**(2.5MB,PDF
239: file)](http://www.novatec.co.jp/NTNP425BBrochureE.pdf).
240:
241: Support for the NTNP425B was written by Ichiro FUKUHARA.
242:
243: * On-chip timers (_ixpclk0_ used as system clock)
244: * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_)
245: * Other devices inserted into the PCI/mPCI slot
246: * On-chip watchdog timer (_ixpwdog_)
247:
248: ### NVIDIA Tegra K1
249: Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and
250: 8.0_BETA. The Jetson TK1 board is currently supported.
251:
252: ### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3**
253: The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported.
254:
255: ### Samsung **SMDK2410**
256:
257: The SMDK2410 is the reference platform for the Samsung **S3C2410** processor,
258: which has an ARM920T core.
259:
260: More information on the S3C2410 can be found at [Samsung Electronics web page]
261: (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/
262: ARM9Series/S3C2410/S3C2410.htm).
263:
264: Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by
265: Genetec Corp.
266:
267: * On-chip serial ports (_sscom_)
268: * On-chip USB host controller (_ohc_)
269: * On-chip timers (used as system clock)
270: * On-chip SPI (_ssspi_, used for other on-board devices)
271: * 240x320 TFT LCD (_lcd_)
272: * keyboard. (_sskbd_)
273:
274: ### Samsung **SMDK2800**
275:
276: The SMDK2800 is the reference platform for the **Samsung S3C2800** processor,
277: which has an ARM920T core.
278:
279: S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots.
280:
281: Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by
282: Fujitsu Component Ltd., and Genetec Corp.
283:
284: * On-chip serial ports (_sscom_)
285: * On-chip Host-PCI bridge (_sspci_)
286: * On-chip timers (used as system clock)
287: * Other devices inserted into the PCI slots
288:
289: ### Team ASA, Inc. **Npwr**
290:
291: The Npwr is an IOP310-based design targeted at the network-attached storage
292: space. The Npwr comes in several configurations (single or dual Gigabit
293: Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board
294: or as a small server appliance. More information on the Npwr can be found at
295: the [Team ASA web page](http://www.teamasa.com/).
296:
297: Support for the Npwr was written by Jason Thorpe and Allen Briggs, and
298: contributed by Wasabi Systems, Inc.
299:
300: * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_)
301: * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_)
302: * On-board timer in the CPLD (used as system clock)
303: * On-board NS16550-compatible serial port (_com_)
304:
305: ### Technologic Systems **TS-7200**
306:
307: The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer
308: intended as a general purpose core for real embedded applications. The TS-7200
309: uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa)
310: bus and can either boot to CompactFlash or onboard flash. The board also has
311: general purpose digital IO and optional multichannel analog-to-digital
312: converters. More information on the TS-7200 can be found at [Technologic
313: Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html).
314:
315: Support for the TS-7200 was written by Jesse Off
316:
317: * On-CPU RS232 UARTs (2) (_epcom_)
318: * On-CPU 10/100 Ethernet MAC (_epe_)
319: * CompactFlash socket (_wdc_)
320: * USB 1.1 ports (2) (_ohci_)
321: * Watchdog timer on CPLD (_tspld_)
322: * TMP124 high precision temperature sensor via sysctl
323: * 64Hz system clock from on-CPU timers (_epclk_)
324: * HD44780 2x24 text mode LCD (_tslcd_)
325: * 4x4 16 button matrix keypad (_wskbd_)
326: * TS-5620 battery backed RTC daughter-card (_tsrtc_)
327: * 1,2,4 port serial TS-SER daughter cards (_com_)
328: * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_)
329: * Other devices inserted into the PC/104 (_isa_) expansion slot
330:
331: """
332: additional="""
333: * The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/)
334: * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005.
335: """
336: ]]
337: [[!tag tier1port]]
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