1: [[!template id=port
2: port="evbarm"
3: port_alt="arm"
4: port_var1="earm"
5: port_var2="earmeb"
6: port_var3="earmv6hf"
7: port_var4="earmv7hf"
8: port_var5="earmv7hfeb"
9: port_var_install_notes="evbarm-earm"
10: cur_rel="8.1"
11: future_rel="9.0"
12: changes_cur="8.1"
13: changes_future="9.0"
14: thumbnail="//www.netbsd.org/images/ports/evbarm/adi_brh.gif"
15: about="""
16: NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping
17: boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also
18: supports some specific embedded system products based on prototype board
19: designs.
20:
21: Matt Thomas is the maintainer of NetBSD/evbarm.
22:
23: ### CPU types
24:
25: The evbarm port can be built with a variety of CPU options, corresponding to the
26: [large array of ARM CPU architectures](https://en.wikipedia.org/wiki/ARM_architecture#Cores).
27: There are
28: four main variables: the word size, the instruction set, the
29: endianness, and whether there is hardware floating point. By default
30: the CPU type is "earm", and this implies aarch32 (32-bit), earmv5 cpu
31: architecture, little endian (el when explicitly stated), and soft
32: (Emulated) floating point. Another example, suitable for Raspberry PI
33: 2, is earmv7hf, which is aarch32, the v7 instruction set, little
34: endian, and hardware floating point.
35:
36: Typically, various boards are best compiled with a CPU type that
37: matches the board's CPU and floating point support, but generally a
38: lower CPU instruction set version is workable on a newer board. See
39: build.sh and look for aliases for the evbarm port.
40:
41: Through NetBSD 8, the evbarm port has supported exclusively the
42: aarch32 (32-bit CPU) sub-family of the ARM architecture. Some
43: processors, such as many supporting the armv8 CPU architecture, also
44: support a 64-bit instruction set, referred to as aarch64. This is
45: sometimes referred to as a distinct port, [[NetBSD/aarch64|aarch64]],
46: with code in src/sys/arch/aarch64, but it is built as the evbarm port
47: with aarch64 cpu type, and available as the alias evbarm64.
48:
49: Note that MACHINE_ARCH=aarch64 currently refers to the A64 instruction
50: set and the aarch64 architecture, built for the armv8 architecture.
51: (Note also that armv8 is the first architecture to support aarch64, so
52: this will not be an issue until at least armv9.)
53:
54: #### ABI types
55:
56: There are two basic ABIs on ARM. One, called oabi, assumed a
57: particular kind of hardware floating point (FPA). This results in
58: faulting any floating-point instructions for kernel emulation on a
59: vast number of CPus, which is very slow. A newer one, called eabi,
60: has two variants. Both have stricter alignment rules, tending to 8
61: byte rather than 4 bytes for 8-byte types (but actually read the specs
62: if you care). The one without "hf" emulates floating point without
63: causing traps/emulation, and "hf" uses VFP instructions, which are
64: present on modern CPUs. See the
65: [TS-7200](https://wiki.embeddedarm.com/wiki/EABI_vs_OABI) and
66: [Debian](https://wiki.debian.org/ArmEabiPort) documentation.
67:
68: Now, EABI is normal, and OABI is crufty. The only real reason NetBSD
69: retains OABI support is binary compatibility with older releases. The
70: "arm" and "armeb" MACHINE_ARCH targets are OABI; the rest of the
71: targets, all having "earm" are EABI.
72:
73: \todo CHECK THIS: The "aarch64" MACHINE_ARCH target is an EABI variant.
74:
75: ### Relationship of MACHINE_ARCH to official ARM terminology
76:
77: Note that these are all little endian, and have big endian variants
78: with a "eb" suffix. Unless otherwise noted, all use the A32 or
79: aarch32 instruction set.
80:
81: [[!table data=<<EOT
82: MACHINE_ARCH |bits | ARM architecture version |ABI
83: arm |32 |\todo ? |oabi
84: earm |32 |alias for earmv5 (\todo why?) |eabi
85: earmv4 |32 |armv4 (no thumb, so ok on strongarm) |eabi
86: earmv5 |32 |armv5t |eabi
87: earmv6 |32 |armv6 |eabi
88: earmv7 |32 |armv7 |eabi
89: aarch64 |64 |armv8 in aarch64 mode |\todo ? eabi
90: EOT]]
91:
92: \todo Explain why, if we have armv5, we still have earm as a MACHINE_ARCH.
93:
94: \todo Explain why aarch64 is a MACHINE_ARCH, when it seems like it
95: should be something like armv8hf_64.
96:
97: \todo Explain if MACHINE_ARCH values correspond to a particular
98: argument to some CPU selection command in gcc (and/or clang).
99:
100: ### Kernels and userland
101:
102: The evbarm userland can be used on any system that can run code of the
103: CPU type used for the build. Typically, a particular board requires a
104: kernel for that board.
105:
106: ### anita and qemu
107:
108: anita can be used to test builds. (In addition to anita, install qemu and dtb-arm-vexpress from pkgsrc.) The release subdirectory should follow the naming convention on the autobuild cluster, used below.
109:
110: - evbarm-earmv7hf uses "qemu-system-arm -M vexpress-a15"
111: - evbarm-aarch64 uses "qemu-system-aarch64 -M virt"
112: - Information on how to test emulated versions of other specific hardware is welcome.
113:
114: ### Board specific information
115: - [[Allwinner sunxi family SoCs|Allwinner]]
116: - [[BeagleBone, BeagleBone Black, and PocketBeagle|BeagleBone]]
117: - [[NVIDIA Tegra|Tegra]]
118: - [[ODROID C1 and C1+|ODROID-C1]]
119: - [[Raspberry Pi 1, 2 and 3|Raspberry Pi]]
120:
121: """
122:
123: supported_hardware="""
124:
125: **NOTE**: This list is incomplete. For a full list of configurations, please see the [evbarm kernel configs](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/evbarm/conf/) directory in CVS.
126:
127: [[!toc startlevel=3]]
128:
129: ### ADI Engineering **BRH** ("Big Red Head")
130:
131: The BRH is an evaluation and development platform for the Intel **i80200**
132: XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion
133: Chip"). The BRH is capable of both big- and little-endian operation, although
134: NetBSD currently only supports little-endian operation.
135:
136: Support for the BRH was written by Jason Thorpe, and contributed by Wasabi
137: Systems, Inc.
138:
139: * On-board NS16550-compatible serial ports (_com_)
140: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
141: * On-chip timer on the BECC (used as system clock)
142: * Other devices inserted into the PCI slot
143:
144: The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are
145: limited to 64M due to the layout of the PCI DMA windows. Users of these
146: systems should obtain an FPGA upgrade from ADI to revision 8 or later of the
147: BECC.
148:
149: ### Allwinner Technology
150: Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31.
151:
152: ### Arcom **Viper**
153:
154: The Arcom Viper is a single board computer based on the PXA255 XScale
155: processor.
156:
157: Support for the Arcom Viper was written by Antti Kantee.
158:
159: * On-chip timers (_saost_ used as system clock)
160: * On-chip serial ports (_com_)
161: * On-board SMC91C111 ethernet (_sm_)
162:
163: ### ARM, Ltd. **Integrator**
164:
165: The Integrator/AP is an ATX form-factor board that is used for development of
166: ARM processor-based designs. It supports up to four processors on plug-in core
167: modules, and provides clocks, a bus interface, and interrupt support. The
168: Integrator/AP also supports logic modules which provide additional
169: peripherals, and can accommodate up to three PCI expansion cards. The
170: Integrator/AP can also be inserted into a CompactPCI backplane.
171:
172: Support for the Integrator was written by Richard Earnshaw, and contributed by
173: ARM, Ltd.
174:
175: * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_)
176: * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_)
177: * PrimeCell PL181 MultiMedia Card Interface
178: * Other devices inserted into the PCI expansion slots
179:
180: ### Atmark Techno **Armadillo-9**
181:
182: The Armadillo-9 is a single board computer based on the EP9315 processor.
183:
184: Support for the Armadillo-9 was written by Katsuomi Hamajima.
185:
186: * On-CPU RS232 UARTs (2) (_epcom_)
187: * On-CPU 10/100 Ethernet MAC (_epe_)
188: * system clock from on-CPU timers (_epclk_)
189: * CompactFlash socket (_eppcic_)
190: * USB 1.1 ports (_ohci_)
191:
192: ### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM**
193: The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org.
194:
195: ### BeagleBoard.org **BeagleBone** and **BeagleBone Black**
196: The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org.
197:
198: ### Gumstix, Inc. **gumstix**
199:
200: The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard
201: based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now.
202:
203: Support for the gumstix was written by KIYOHARA Takashi.
204:
205: * basix
206: * cfstix
207: * etherstix
208: * netCF
209: * netDUO
210: * netDUO-mmc
211: * netMMC
212:
213: When booting, it is necessary to set these with u-boot dynamically.
214:
215: <pre> > go 0xa0200000 busheader=basix</pre>
216:
217: * audiostix
218: * console-st (waysmall - STUART)
219: * console-hw (waysmall)
220: * GPSstix (GPS not test)
221: * tweener
222:
223: ### Hardkernel ODROID-C1 and ODROID-C1+
224:
225: The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd.
226:
227: ### Intel **DBPXA250** ("Lubbock")
228:
229: DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the
230: Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm).
231:
232: Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed
233: by Genetec Corp.
234:
235: * On-chip timers (_saost_ used as system clock)
236: * On-chip 2 serial port (_com_)
237: * On-board SMC91C96 ethernet (_sm_)
238: * On-board SA-1111 StrongArm companion chip (_sacc_)
239: * PS/2 keyboard (_pckbd_)
240: * 640x480 LCD (_lcd_)
241: * PCMCIA and CF card slots
242:
243: ### Intel **IQ31244**
244:
245: The IQ31244 is a development platform for the Intel **IOP321** I/O Processor
246: chipset and the Intel **i31244** SATA controller.
247:
248: Initial support for the IQ31244 was written by Jason Thorpe, and contributed
249: by Wasabi Systems, Inc.
250:
251: * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_)
252: * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_)
253: * On-board NS16550-compatible serial port (_com_)
254: * On-chip timers (TMR0 used as system clock)
255: * On-chip Application Accelerator Unit (_iopaau_)
256: * On-chip watchdog timer (_iopwdog_)
257: * On-board compact flash reader (_wdc_)
258: * Other devices inserted into the PCI-X expansion slot
259:
260: ### Intel **IQ80310**
261:
262: The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor
263: chipset, which is comprised of the i80200 XScale processor and the i80312 I/O
264: Companion chip.
265:
266: Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and
267: contributed by Wasabi Systems, Inc.
268:
269: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
270: * On-board timer in the CPLD (used as system clock)
271: * On-board NS16550-compatible serial ports (_com_)
272: * Other devices inserted into the PCI expansion slots
273:
274: ### Intel **IQ80321**
275:
276: The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor
277: (i80321 XScale processor).
278:
279: Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi
280: Systems, Inc.
281:
282: * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_)
283: * On-board NS16550-compatible serial port (_com_)
284: * On-chip timers (TMR0 used as system clock)
285: * On-chip Application Accelerator Unit (_iopaau_)
286: * On-chip watchdog timer (_iopwdog_)
287: * Other devices inserted into the PCI-X expansion slots
288:
289: ### Intel **IXM1200**
290:
291: The IXM1200 is the reference platform for the Intel **IXP1200** Network
292: Processor.
293:
294: Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki.
295:
296: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
297: * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_)
298: * On-chip timers (ixpclk0 used as system clock)
299: * On-chip serial port (_ixpcom_)
300:
301: ### NOVATEC **NTNP425B** ("ZAO425")
302:
303: NTNP425B is an evaluation and development platform for the Intel **IXP425**
304: XScale Core NetworkProcessor. NTNP425B is based on the reference board of
305: Intel **IXDP425**. The **NTNP425B** is capable of only big-endian operation.
306: Since the library for micro-engine(NPE) offered from Intel Corp. is big-
307: endian. More information about the **NTNP425B** can be found on [product
308: catalogue of **NTNP425B**(2.5MB,PDF
309: file)](http://www.novatec.co.jp/NTNP425BBrochureE.pdf).
310:
311: Support for the NTNP425B was written by Ichiro FUKUHARA.
312:
313: * On-chip timers (_ixpclk0_ used as system clock)
314: * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_)
315: * Other devices inserted into the PCI/mPCI slot
316: * On-chip watchdog timer (_ixpwdog_)
317:
318: ### NVIDIA Tegra K1
319: Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and
320: 8.0_BETA. The Jetson TK1 board is currently supported.
321:
322: ### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3**
323: The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported.
324:
325: ### Samsung **SMDK2410**
326:
327: The SMDK2410 is the reference platform for the Samsung **S3C2410** processor,
328: which has an ARM920T core.
329:
330: More information on the S3C2410 can be found at [Samsung Electronics web page]
331: (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/
332: ARM9Series/S3C2410/S3C2410.htm).
333:
334: Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by
335: Genetec Corp.
336:
337: * On-chip serial ports (_sscom_)
338: * On-chip USB host controller (_ohc_)
339: * On-chip timers (used as system clock)
340: * On-chip SPI (_ssspi_, used for other on-board devices)
341: * 240x320 TFT LCD (_lcd_)
342: * keyboard. (_sskbd_)
343:
344: ### Samsung **SMDK2800**
345:
346: The SMDK2800 is the reference platform for the **Samsung S3C2800** processor,
347: which has an ARM920T core.
348:
349: S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots.
350:
351: Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by
352: Fujitsu Component Ltd., and Genetec Corp.
353:
354: * On-chip serial ports (_sscom_)
355: * On-chip Host-PCI bridge (_sspci_)
356: * On-chip timers (used as system clock)
357: * Other devices inserted into the PCI slots
358:
359: ### Team ASA, Inc. **Npwr**
360:
361: The Npwr is an IOP310-based design targeted at the network-attached storage
362: space. The Npwr comes in several configurations (single or dual Gigabit
363: Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board
364: or as a small server appliance. More information on the Npwr can be found at
365: the [Team ASA web page](http://www.teamasa.com/).
366:
367: Support for the Npwr was written by Jason Thorpe and Allen Briggs, and
368: contributed by Wasabi Systems, Inc.
369:
370: * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_)
371: * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_)
372: * On-board timer in the CPLD (used as system clock)
373: * On-board NS16550-compatible serial port (_com_)
374:
375: ### Technologic Systems **TS-7200**
376:
377: The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer
378: intended as a general purpose core for real embedded applications. The TS-7200
379: uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa)
380: bus and can either boot to CompactFlash or onboard flash. The board also has
381: general purpose digital IO and optional multichannel analog-to-digital
382: converters. More information on the TS-7200 can be found at [Technologic
383: Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html).
384:
385: Support for the TS-7200 was written by Jesse Off
386:
387: * On-CPU RS232 UARTs (2) (_epcom_)
388: * On-CPU 10/100 Ethernet MAC (_epe_)
389: * CompactFlash socket (_wdc_)
390: * USB 1.1 ports (2) (_ohci_)
391: * Watchdog timer on CPLD (_tspld_)
392: * TMP124 high precision temperature sensor via sysctl
393: * 64Hz system clock from on-CPU timers (_epclk_)
394: * HD44780 2x24 text mode LCD (_tslcd_)
395: * 4x4 16 button matrix keypad (_wskbd_)
396: * TS-5620 battery backed RTC daughter-card (_tsrtc_)
397: * 1,2,4 port serial TS-SER daughter cards (_com_)
398: * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_)
399: * Other devices inserted into the PC/104 (_isa_) expansion slot
400:
401: """
402: additional="""
403: * The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/)
404: * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005.
405: """
406: ]]
407: [[!tag tier1port]]
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