Annotation of wikisrc/ports/evbarm.mdwn, revision 1.73
1.1 mspo 1: [[!template id=port
2: port="evbarm"
1.6 mspo 3: port_alt="arm"
1.49 leot 4: port_var1="earm"
5: port_var2="earmeb"
6: port_var3="earmv6hf"
7: port_var4="earmv7hf"
8: port_var5="earmv7hfeb"
9: port_var_install_notes="evbarm-earm"
1.70 martin 10: cur_rel="8.1"
1.48 martin 11: future_rel="9.0"
1.70 martin 12: changes_cur="8.1"
1.48 martin 13: changes_future="9.0"
1.71 leot 14: thumbnail="//www.netbsd.org/images/ports/evbarm/adi_brh.gif"
1.1 mspo 15: about="""
16: NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping
17: boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also
18: supports some specific embedded system products based on prototype board
19: designs.
20:
1.42 gdt 21: ### CPU types
22:
1.57 gdt 23: The evbarm port can be built with a variety of CPU options, corresponding to the
24: [large array of ARM CPU architectures](https://en.wikipedia.org/wiki/ARM_architecture#Cores).
25: There are
1.56 gdt 26: four main variables: the word size, the instruction set, the
27: endianness, and whether there is hardware floating point. By default
1.68 gdt 28: the CPU type is "earm", and this implies aarch32 (32-bit), earmv5 cpu
1.56 gdt 29: architecture, little endian (el when explicitly stated), and soft
1.58 gdt 30: (Emulated) floating point. Another example, suitable for Raspberry PI
1.56 gdt 31: 2, is earmv7hf, which is aarch32, the v7 instruction set, little
32: endian, and hardware floating point.
1.42 gdt 33:
34: Typically, various boards are best compiled with a CPU type that
35: matches the board's CPU and floating point support, but generally a
36: lower CPU instruction set version is workable on a newer board. See
37: build.sh and look for aliases for the evbarm port.
38:
1.56 gdt 39: Through NetBSD 8, the evbarm port has supported exclusively the
40: aarch32 (32-bit CPU) sub-family of the ARM architecture. Some
41: processors, such as many supporting the armv8 CPU architecture, also
42: support a 64-bit instruction set, referred to as aarch64. This is
43: sometimes referred to as a distinct port, [[NetBSD/aarch64|aarch64]],
44: with code in src/sys/arch/aarch64, but it is built as the evbarm port
45: with aarch64 cpu type, and available as the alias evbarm64.
1.50 gdt 46:
1.58 gdt 47: Note that MACHINE_ARCH=aarch64 currently refers to the A64 instruction
48: set and the aarch64 architecture, built for the armv8 architecture.
49: (Note also that armv8 is the first architecture to support aarch64, so
50: this will not be an issue until at least armv9.)
51:
1.51 gdt 52: ### anita and qemu
53:
1.52 gdt 54: anita can be used to test builds. (In addition to anita, install qemu and dtb-arm-vexpress from pkgsrc.) The release subdirectory should follow the naming convention on the autobuild cluster, used below.
1.54 gdt 55:
1.55 gson 56: - evbarm-earmv7hf uses "qemu-system-arm -M vexpress-a15"
57: - evbarm-aarch64 uses "qemu-system-aarch64 -M virt"
1.53 gdt 58: - Information on how to test emulated versions of other specific hardware is welcome.
1.51 gdt 59:
1.27 wiki 60: ### Board specific information
1.38 wiki 61: - [[Allwinner sunxi family SoCs|Allwinner]]
1.69 sevan 62: - [[BeagleBone, BeagleBone Black, and PocketBeagle|BeagleBone]]
1.41 wiki 63: - [[NVIDIA Tegra|Tegra]]
1.27 wiki 64: - [[ODROID C1 and C1+|ODROID-C1]]
1.40 gdt 65: - [[Raspberry Pi 1, 2 and 3|Raspberry Pi]]
1.27 wiki 66:
1.1 mspo 67: """
1.27 wiki 68:
1.1 mspo 69: supported_hardware="""
1.11 wiki 70:
1.18 wiki 71: **NOTE**: This list is incomplete. For a full list of configurations, please see the [evbarm kernel configs](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/evbarm/conf/) directory in CVS.
72:
1.11 wiki 73: [[!toc startlevel=3]]
74:
1.36 sevan 75: ### ADI Engineering **BRH** ("Big Red Head")
1.12 wiki 76:
77: The BRH is an evaluation and development platform for the Intel **i80200**
78: XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion
79: Chip"). The BRH is capable of both big- and little-endian operation, although
1.21 snj 80: NetBSD currently only supports little-endian operation.
1.12 wiki 81:
82: Support for the BRH was written by Jason Thorpe, and contributed by Wasabi
83: Systems, Inc.
84:
85: * On-board NS16550-compatible serial ports (_com_)
86: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
87: * On-chip timer on the BECC (used as system clock)
88: * Other devices inserted into the PCI slot
1.5 wiki 89:
1.12 wiki 90: The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are
91: limited to 64M due to the layout of the PCI DMA windows. Users of these
92: systems should obtain an FPGA upgrade from ADI to revision 8 or later of the
93: BECC.
1.5 wiki 94:
1.39 wiki 95: ### Allwinner Technology
1.15 wiki 96: Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31.
1.10 wiki 97:
1.12 wiki 98: ### Arcom **Viper**
1.1 mspo 99:
1.12 wiki 100: The Arcom Viper is a single board computer based on the PXA255 XScale
101: processor.
1.1 mspo 102:
1.12 wiki 103: Support for the Arcom Viper was written by Antti Kantee.
1.1 mspo 104:
1.12 wiki 105: * On-chip timers (_saost_ used as system clock)
106: * On-chip serial ports (_com_)
1.36 sevan 107: * On-board SMC91C111 ethernet (_sm_)
1.1 mspo 108:
1.3 wiki 109: ### ARM, Ltd. **Integrator**
1.1 mspo 110:
111: The Integrator/AP is an ATX form-factor board that is used for development of
112: ARM processor-based designs. It supports up to four processors on plug-in core
113: modules, and provides clocks, a bus interface, and interrupt support. The
114: Integrator/AP also supports logic modules which provide additional
115: peripherals, and can accommodate up to three PCI expansion cards. The
116: Integrator/AP can also be inserted into a CompactPCI backplane.
117:
118: Support for the Integrator was written by Richard Earnshaw, and contributed by
119: ARM, Ltd.
120:
1.2 mspo 121: * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_)
122: * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_)
1.23 ryoon 123: * PrimeCell PL181 MultiMedia Card Interface
1.2 mspo 124: * Other devices inserted into the PCI expansion slots
1.1 mspo 125:
1.12 wiki 126: ### Atmark Techno **Armadillo-9**
127:
128: The Armadillo-9 is a single board computer based on the EP9315 processor.
129:
130: Support for the Armadillo-9 was written by Katsuomi Hamajima.
131:
132: * On-CPU RS232 UARTs (2) (_epcom_)
133: * On-CPU 10/100 Ethernet MAC (_epe_)
134: * system clock from on-CPU timers (_epclk_)
135: * CompactFlash socket (_eppcic_)
136: * USB 1.1 ports (_ohci_)
137:
1.19 wiki 138: ### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM**
139: The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org.
140:
141: ### BeagleBoard.org **BeagleBone** and **BeagleBone Black**
142: The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org.
1.12 wiki 143:
144: ### Gumstix, Inc. **gumstix**
145:
146: The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard
147: based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now.
148:
149: Support for the gumstix was written by KIYOHARA Takashi.
150:
151: * basix
152: * cfstix
153: * etherstix
154: * netCF
155: * netDUO
156: * netDUO-mmc
1.36 sevan 157: * netMMC
1.12 wiki 158:
159: When booting, it is necessary to set these with u-boot dynamically.
160:
161: <pre> > go 0xa0200000 busheader=basix</pre>
162:
163: * audiostix
164: * console-st (waysmall - STUART)
165: * console-hw (waysmall)
166: * GPSstix (GPS not test)
167: * tweener
168:
1.26 wiki 169: ### Hardkernel ODROID-C1 and ODROID-C1+
1.16 wiki 170:
171: The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd.
172:
1.36 sevan 173: ### Intel **DBPXA250** ("Lubbock")
1.12 wiki 174:
175: DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the
176: Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm).
177:
178: Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed
179: by Genetec Corp.
180:
181: * On-chip timers (_saost_ used as system clock)
182: * On-chip 2 serial port (_com_)
183: * On-board SMC91C96 ethernet (_sm_)
184: * On-board SA-1111 StrongArm companion chip (_sacc_)
185: * PS/2 keyboard (_pckbd_)
186: * 640x480 LCD (_lcd_)
187: * PCMCIA and CF card slots
188:
1.3 wiki 189: ### Intel **IQ31244**
1.1 mspo 190:
191: The IQ31244 is a development platform for the Intel **IOP321** I/O Processor
192: chipset and the Intel **i31244** SATA controller.
193:
194: Initial support for the IQ31244 was written by Jason Thorpe, and contributed
195: by Wasabi Systems, Inc.
196:
1.2 mspo 197: * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_)
198: * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_)
199: * On-board NS16550-compatible serial port (_com_)
200: * On-chip timers (TMR0 used as system clock)
201: * On-chip Application Accelerator Unit (_iopaau_)
202: * On-chip watchdog timer (_iopwdog_)
203: * On-board compact flash reader (_wdc_)
204: * Other devices inserted into the PCI-X expansion slot
1.1 mspo 205:
1.3 wiki 206: ### Intel **IQ80310**
1.1 mspo 207:
208: The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor
209: chipset, which is comprised of the i80200 XScale processor and the i80312 I/O
210: Companion chip.
211:
212: Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and
213: contributed by Wasabi Systems, Inc.
214:
1.2 mspo 215: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
216: * On-board timer in the CPLD (used as system clock)
217: * On-board NS16550-compatible serial ports (_com_)
218: * Other devices inserted into the PCI expansion slots
1.1 mspo 219:
1.3 wiki 220: ### Intel **IQ80321**
1.1 mspo 221:
222: The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor
223: (i80321 XScale processor).
224:
225: Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi
226: Systems, Inc.
227:
1.2 mspo 228: * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_)
229: * On-board NS16550-compatible serial port (_com_)
230: * On-chip timers (TMR0 used as system clock)
231: * On-chip Application Accelerator Unit (_iopaau_)
232: * On-chip watchdog timer (_iopwdog_)
233: * Other devices inserted into the PCI-X expansion slots
1.1 mspo 234:
1.3 wiki 235: ### Intel **IXM1200**
1.1 mspo 236:
237: The IXM1200 is the reference platform for the Intel **IXP1200** Network
238: Processor.
239:
240: Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki.
241:
1.2 mspo 242: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
243: * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_)
244: * On-chip timers (ixpclk0 used as system clock)
245: * On-chip serial port (_ixpcom_)
1.1 mspo 246:
1.36 sevan 247: ### NOVATEC **NTNP425B** ("ZAO425")
1.12 wiki 248:
249: NTNP425B is an evaluation and development platform for the Intel **IXP425**
250: XScale Core NetworkProcessor. NTNP425B is based on the reference board of
251: Intel **IXDP425**. The **NTNP425B** is capable of only big-endian operation.
252: Since the library for micro-engine(NPE) offered from Intel Corp. is big-
253: endian. More information about the **NTNP425B** can be found on [product
254: catalogue of **NTNP425B**(2.5MB,PDF
255: file)](http://www.novatec.co.jp/NTNP425BBrochureE.pdf).
256:
257: Support for the NTNP425B was written by Ichiro FUKUHARA.
258:
259: * On-chip timers (_ixpclk0_ used as system clock)
260: * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_)
261: * Other devices inserted into the PCI/mPCI slot
262: * On-chip watchdog timer (_ixpwdog_)
263:
1.20 wiki 264: ### NVIDIA Tegra K1
1.37 snj 265: Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and
266: 8.0_BETA. The Jetson TK1 board is currently supported.
1.20 wiki 267:
1.40 gdt 268: ### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3**
269: The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported.
1.12 wiki 270:
1.3 wiki 271: ### Samsung **SMDK2410**
1.1 mspo 272:
273: The SMDK2410 is the reference platform for the Samsung **S3C2410** processor,
274: which has an ARM920T core.
275:
276: More information on the S3C2410 can be found at [Samsung Electronics web page]
277: (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/
278: ARM9Series/S3C2410/S3C2410.htm).
279:
280: Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by
281: Genetec Corp.
282:
1.2 mspo 283: * On-chip serial ports (_sscom_)
284: * On-chip USB host controller (_ohc_)
285: * On-chip timers (used as system clock)
286: * On-chip SPI (_ssspi_, used for other on-board devices)
287: * 240x320 TFT LCD (_lcd_)
288: * keyboard. (_sskbd_)
1.1 mspo 289:
1.3 wiki 290: ### Samsung **SMDK2800**
1.1 mspo 291:
292: The SMDK2800 is the reference platform for the **Samsung S3C2800** processor,
293: which has an ARM920T core.
294:
295: S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots.
296:
297: Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by
298: Fujitsu Component Ltd., and Genetec Corp.
299:
1.2 mspo 300: * On-chip serial ports (_sscom_)
301: * On-chip Host-PCI bridge (_sspci_)
302: * On-chip timers (used as system clock)
1.36 sevan 303: * Other devices inserted into the PCI slots
1.1 mspo 304:
1.12 wiki 305: ### Team ASA, Inc. **Npwr**
1.1 mspo 306:
1.12 wiki 307: The Npwr is an IOP310-based design targeted at the network-attached storage
308: space. The Npwr comes in several configurations (single or dual Gigabit
309: Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board
310: or as a small server appliance. More information on the Npwr can be found at
311: the [Team ASA web page](http://www.teamasa.com/).
1.1 mspo 312:
1.12 wiki 313: Support for the Npwr was written by Jason Thorpe and Allen Briggs, and
314: contributed by Wasabi Systems, Inc.
1.1 mspo 315:
1.12 wiki 316: * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_)
317: * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_)
318: * On-board timer in the CPLD (used as system clock)
319: * On-board NS16550-compatible serial port (_com_)
1.1 mspo 320:
1.12 wiki 321: ### Technologic Systems **TS-7200**
1.1 mspo 322:
1.12 wiki 323: The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer
324: intended as a general purpose core for real embedded applications. The TS-7200
325: uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa)
326: bus and can either boot to CompactFlash or onboard flash. The board also has
327: general purpose digital IO and optional multichannel analog-to-digital
328: converters. More information on the TS-7200 can be found at [Technologic
329: Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html).
1.1 mspo 330:
1.12 wiki 331: Support for the TS-7200 was written by Jesse Off
1.1 mspo 332:
1.12 wiki 333: * On-CPU RS232 UARTs (2) (_epcom_)
334: * On-CPU 10/100 Ethernet MAC (_epe_)
335: * CompactFlash socket (_wdc_)
336: * USB 1.1 ports (2) (_ohci_)
337: * Watchdog timer on CPLD (_tspld_)
338: * TMP124 high precision temperature sensor via sysctl
339: * 64Hz system clock from on-CPU timers (_epclk_)
340: * HD44780 2x24 text mode LCD (_tslcd_)
341: * 4x4 16 button matrix keypad (_wskbd_)
342: * TS-5620 battery backed RTC daughter-card (_tsrtc_)
343: * 1,2,4 port serial TS-SER daughter cards (_com_)
344: * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_)
345: * Other devices inserted into the PC/104 (_isa_) expansion slot
1.1 mspo 346:
347: """
1.13 wiki 348: additional="""
1.22 wiki 349: * The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/)
1.36 sevan 350: * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005.
1.1 mspo 351: """
352: ]]
353: [[!tag tier1port]]
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