Annotation of wikisrc/ports/evbarm.mdwn, revision 1.72
1.1 mspo 1: [[!template id=port
2: port="evbarm"
1.6 mspo 3: port_alt="arm"
1.49 leot 4: port_var1="earm"
5: port_var2="earmeb"
6: port_var3="earmv6hf"
7: port_var4="earmv7hf"
8: port_var5="earmv7hfeb"
9: port_var_install_notes="evbarm-earm"
1.70 martin 10: cur_rel="8.1"
1.48 martin 11: future_rel="9.0"
1.70 martin 12: changes_cur="8.1"
1.48 martin 13: changes_future="9.0"
1.71 leot 14: thumbnail="//www.netbsd.org/images/ports/evbarm/adi_brh.gif"
1.1 mspo 15: about="""
16: NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping
17: boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also
18: supports some specific embedded system products based on prototype board
19: designs.
20:
1.7 mspo 21: Matt Thomas is the maintainer of NetBSD/evbarm.
1.27 wiki 22:
1.42 gdt 23: ### CPU types
24:
1.57 gdt 25: The evbarm port can be built with a variety of CPU options, corresponding to the
26: [large array of ARM CPU architectures](https://en.wikipedia.org/wiki/ARM_architecture#Cores).
27: There are
1.56 gdt 28: four main variables: the word size, the instruction set, the
29: endianness, and whether there is hardware floating point. By default
1.68 gdt 30: the CPU type is "earm", and this implies aarch32 (32-bit), earmv5 cpu
1.56 gdt 31: architecture, little endian (el when explicitly stated), and soft
1.58 gdt 32: (Emulated) floating point. Another example, suitable for Raspberry PI
1.56 gdt 33: 2, is earmv7hf, which is aarch32, the v7 instruction set, little
34: endian, and hardware floating point.
1.42 gdt 35:
36: Typically, various boards are best compiled with a CPU type that
37: matches the board's CPU and floating point support, but generally a
38: lower CPU instruction set version is workable on a newer board. See
39: build.sh and look for aliases for the evbarm port.
40:
1.56 gdt 41: Through NetBSD 8, the evbarm port has supported exclusively the
42: aarch32 (32-bit CPU) sub-family of the ARM architecture. Some
43: processors, such as many supporting the armv8 CPU architecture, also
44: support a 64-bit instruction set, referred to as aarch64. This is
45: sometimes referred to as a distinct port, [[NetBSD/aarch64|aarch64]],
46: with code in src/sys/arch/aarch64, but it is built as the evbarm port
47: with aarch64 cpu type, and available as the alias evbarm64.
1.50 gdt 48:
1.58 gdt 49: Note that MACHINE_ARCH=aarch64 currently refers to the A64 instruction
50: set and the aarch64 architecture, built for the armv8 architecture.
51: (Note also that armv8 is the first architecture to support aarch64, so
52: this will not be an issue until at least armv9.)
53:
1.43 gdt 54: ### Kernels and userland
55:
56: The evbarm userland can be used on any system that can run code of the
57: CPU type used for the build. Typically, a particular board requires a
58: kernel for that board.
59:
1.51 gdt 60: ### anita and qemu
61:
1.52 gdt 62: anita can be used to test builds. (In addition to anita, install qemu and dtb-arm-vexpress from pkgsrc.) The release subdirectory should follow the naming convention on the autobuild cluster, used below.
1.54 gdt 63:
1.55 gson 64: - evbarm-earmv7hf uses "qemu-system-arm -M vexpress-a15"
65: - evbarm-aarch64 uses "qemu-system-aarch64 -M virt"
1.53 gdt 66: - Information on how to test emulated versions of other specific hardware is welcome.
1.51 gdt 67:
1.27 wiki 68: ### Board specific information
1.38 wiki 69: - [[Allwinner sunxi family SoCs|Allwinner]]
1.69 sevan 70: - [[BeagleBone, BeagleBone Black, and PocketBeagle|BeagleBone]]
1.41 wiki 71: - [[NVIDIA Tegra|Tegra]]
1.27 wiki 72: - [[ODROID C1 and C1+|ODROID-C1]]
1.40 gdt 73: - [[Raspberry Pi 1, 2 and 3|Raspberry Pi]]
1.27 wiki 74:
1.1 mspo 75: """
1.27 wiki 76:
1.1 mspo 77: supported_hardware="""
1.11 wiki 78:
1.18 wiki 79: **NOTE**: This list is incomplete. For a full list of configurations, please see the [evbarm kernel configs](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/evbarm/conf/) directory in CVS.
80:
1.11 wiki 81: [[!toc startlevel=3]]
82:
1.36 sevan 83: ### ADI Engineering **BRH** ("Big Red Head")
1.12 wiki 84:
85: The BRH is an evaluation and development platform for the Intel **i80200**
86: XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion
87: Chip"). The BRH is capable of both big- and little-endian operation, although
1.21 snj 88: NetBSD currently only supports little-endian operation.
1.12 wiki 89:
90: Support for the BRH was written by Jason Thorpe, and contributed by Wasabi
91: Systems, Inc.
92:
93: * On-board NS16550-compatible serial ports (_com_)
94: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
95: * On-chip timer on the BECC (used as system clock)
96: * Other devices inserted into the PCI slot
1.5 wiki 97:
1.12 wiki 98: The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are
99: limited to 64M due to the layout of the PCI DMA windows. Users of these
100: systems should obtain an FPGA upgrade from ADI to revision 8 or later of the
101: BECC.
1.5 wiki 102:
1.39 wiki 103: ### Allwinner Technology
1.15 wiki 104: Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31.
1.10 wiki 105:
1.12 wiki 106: ### Arcom **Viper**
1.1 mspo 107:
1.12 wiki 108: The Arcom Viper is a single board computer based on the PXA255 XScale
109: processor.
1.1 mspo 110:
1.12 wiki 111: Support for the Arcom Viper was written by Antti Kantee.
1.1 mspo 112:
1.12 wiki 113: * On-chip timers (_saost_ used as system clock)
114: * On-chip serial ports (_com_)
1.36 sevan 115: * On-board SMC91C111 ethernet (_sm_)
1.1 mspo 116:
1.3 wiki 117: ### ARM, Ltd. **Integrator**
1.1 mspo 118:
119: The Integrator/AP is an ATX form-factor board that is used for development of
120: ARM processor-based designs. It supports up to four processors on plug-in core
121: modules, and provides clocks, a bus interface, and interrupt support. The
122: Integrator/AP also supports logic modules which provide additional
123: peripherals, and can accommodate up to three PCI expansion cards. The
124: Integrator/AP can also be inserted into a CompactPCI backplane.
125:
126: Support for the Integrator was written by Richard Earnshaw, and contributed by
127: ARM, Ltd.
128:
1.2 mspo 129: * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_)
130: * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_)
1.23 ryoon 131: * PrimeCell PL181 MultiMedia Card Interface
1.2 mspo 132: * Other devices inserted into the PCI expansion slots
1.1 mspo 133:
1.12 wiki 134: ### Atmark Techno **Armadillo-9**
135:
136: The Armadillo-9 is a single board computer based on the EP9315 processor.
137:
138: Support for the Armadillo-9 was written by Katsuomi Hamajima.
139:
140: * On-CPU RS232 UARTs (2) (_epcom_)
141: * On-CPU 10/100 Ethernet MAC (_epe_)
142: * system clock from on-CPU timers (_epclk_)
143: * CompactFlash socket (_eppcic_)
144: * USB 1.1 ports (_ohci_)
145:
1.19 wiki 146: ### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM**
147: The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org.
148:
149: ### BeagleBoard.org **BeagleBone** and **BeagleBone Black**
150: The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org.
1.12 wiki 151:
152: ### Gumstix, Inc. **gumstix**
153:
154: The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard
155: based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now.
156:
157: Support for the gumstix was written by KIYOHARA Takashi.
158:
159: * basix
160: * cfstix
161: * etherstix
162: * netCF
163: * netDUO
164: * netDUO-mmc
1.36 sevan 165: * netMMC
1.12 wiki 166:
167: When booting, it is necessary to set these with u-boot dynamically.
168:
169: <pre> > go 0xa0200000 busheader=basix</pre>
170:
171: * audiostix
172: * console-st (waysmall - STUART)
173: * console-hw (waysmall)
174: * GPSstix (GPS not test)
175: * tweener
176:
1.26 wiki 177: ### Hardkernel ODROID-C1 and ODROID-C1+
1.16 wiki 178:
179: The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd.
180:
1.36 sevan 181: ### Intel **DBPXA250** ("Lubbock")
1.12 wiki 182:
183: DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the
184: Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm).
185:
186: Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed
187: by Genetec Corp.
188:
189: * On-chip timers (_saost_ used as system clock)
190: * On-chip 2 serial port (_com_)
191: * On-board SMC91C96 ethernet (_sm_)
192: * On-board SA-1111 StrongArm companion chip (_sacc_)
193: * PS/2 keyboard (_pckbd_)
194: * 640x480 LCD (_lcd_)
195: * PCMCIA and CF card slots
196:
1.3 wiki 197: ### Intel **IQ31244**
1.1 mspo 198:
199: The IQ31244 is a development platform for the Intel **IOP321** I/O Processor
200: chipset and the Intel **i31244** SATA controller.
201:
202: Initial support for the IQ31244 was written by Jason Thorpe, and contributed
203: by Wasabi Systems, Inc.
204:
1.2 mspo 205: * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_)
206: * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_)
207: * On-board NS16550-compatible serial port (_com_)
208: * On-chip timers (TMR0 used as system clock)
209: * On-chip Application Accelerator Unit (_iopaau_)
210: * On-chip watchdog timer (_iopwdog_)
211: * On-board compact flash reader (_wdc_)
212: * Other devices inserted into the PCI-X expansion slot
1.1 mspo 213:
1.3 wiki 214: ### Intel **IQ80310**
1.1 mspo 215:
216: The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor
217: chipset, which is comprised of the i80200 XScale processor and the i80312 I/O
218: Companion chip.
219:
220: Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and
221: contributed by Wasabi Systems, Inc.
222:
1.2 mspo 223: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
224: * On-board timer in the CPLD (used as system clock)
225: * On-board NS16550-compatible serial ports (_com_)
226: * Other devices inserted into the PCI expansion slots
1.1 mspo 227:
1.3 wiki 228: ### Intel **IQ80321**
1.1 mspo 229:
230: The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor
231: (i80321 XScale processor).
232:
233: Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi
234: Systems, Inc.
235:
1.2 mspo 236: * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_)
237: * On-board NS16550-compatible serial port (_com_)
238: * On-chip timers (TMR0 used as system clock)
239: * On-chip Application Accelerator Unit (_iopaau_)
240: * On-chip watchdog timer (_iopwdog_)
241: * Other devices inserted into the PCI-X expansion slots
1.1 mspo 242:
1.3 wiki 243: ### Intel **IXM1200**
1.1 mspo 244:
245: The IXM1200 is the reference platform for the Intel **IXP1200** Network
246: Processor.
247:
248: Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki.
249:
1.2 mspo 250: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
251: * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_)
252: * On-chip timers (ixpclk0 used as system clock)
253: * On-chip serial port (_ixpcom_)
1.1 mspo 254:
1.36 sevan 255: ### NOVATEC **NTNP425B** ("ZAO425")
1.12 wiki 256:
257: NTNP425B is an evaluation and development platform for the Intel **IXP425**
258: XScale Core NetworkProcessor. NTNP425B is based on the reference board of
259: Intel **IXDP425**. The **NTNP425B** is capable of only big-endian operation.
260: Since the library for micro-engine(NPE) offered from Intel Corp. is big-
261: endian. More information about the **NTNP425B** can be found on [product
262: catalogue of **NTNP425B**(2.5MB,PDF
263: file)](http://www.novatec.co.jp/NTNP425BBrochureE.pdf).
264:
265: Support for the NTNP425B was written by Ichiro FUKUHARA.
266:
267: * On-chip timers (_ixpclk0_ used as system clock)
268: * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_)
269: * Other devices inserted into the PCI/mPCI slot
270: * On-chip watchdog timer (_ixpwdog_)
271:
1.20 wiki 272: ### NVIDIA Tegra K1
1.37 snj 273: Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and
274: 8.0_BETA. The Jetson TK1 board is currently supported.
1.20 wiki 275:
1.40 gdt 276: ### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3**
277: The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported.
1.12 wiki 278:
1.3 wiki 279: ### Samsung **SMDK2410**
1.1 mspo 280:
281: The SMDK2410 is the reference platform for the Samsung **S3C2410** processor,
282: which has an ARM920T core.
283:
284: More information on the S3C2410 can be found at [Samsung Electronics web page]
285: (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/
286: ARM9Series/S3C2410/S3C2410.htm).
287:
288: Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by
289: Genetec Corp.
290:
1.2 mspo 291: * On-chip serial ports (_sscom_)
292: * On-chip USB host controller (_ohc_)
293: * On-chip timers (used as system clock)
294: * On-chip SPI (_ssspi_, used for other on-board devices)
295: * 240x320 TFT LCD (_lcd_)
296: * keyboard. (_sskbd_)
1.1 mspo 297:
1.3 wiki 298: ### Samsung **SMDK2800**
1.1 mspo 299:
300: The SMDK2800 is the reference platform for the **Samsung S3C2800** processor,
301: which has an ARM920T core.
302:
303: S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots.
304:
305: Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by
306: Fujitsu Component Ltd., and Genetec Corp.
307:
1.2 mspo 308: * On-chip serial ports (_sscom_)
309: * On-chip Host-PCI bridge (_sspci_)
310: * On-chip timers (used as system clock)
1.36 sevan 311: * Other devices inserted into the PCI slots
1.1 mspo 312:
1.12 wiki 313: ### Team ASA, Inc. **Npwr**
1.1 mspo 314:
1.12 wiki 315: The Npwr is an IOP310-based design targeted at the network-attached storage
316: space. The Npwr comes in several configurations (single or dual Gigabit
317: Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board
318: or as a small server appliance. More information on the Npwr can be found at
319: the [Team ASA web page](http://www.teamasa.com/).
1.1 mspo 320:
1.12 wiki 321: Support for the Npwr was written by Jason Thorpe and Allen Briggs, and
322: contributed by Wasabi Systems, Inc.
1.1 mspo 323:
1.12 wiki 324: * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_)
325: * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_)
326: * On-board timer in the CPLD (used as system clock)
327: * On-board NS16550-compatible serial port (_com_)
1.1 mspo 328:
1.12 wiki 329: ### Technologic Systems **TS-7200**
1.1 mspo 330:
1.12 wiki 331: The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer
332: intended as a general purpose core for real embedded applications. The TS-7200
333: uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa)
334: bus and can either boot to CompactFlash or onboard flash. The board also has
335: general purpose digital IO and optional multichannel analog-to-digital
336: converters. More information on the TS-7200 can be found at [Technologic
337: Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html).
1.1 mspo 338:
1.12 wiki 339: Support for the TS-7200 was written by Jesse Off
1.1 mspo 340:
1.12 wiki 341: * On-CPU RS232 UARTs (2) (_epcom_)
342: * On-CPU 10/100 Ethernet MAC (_epe_)
343: * CompactFlash socket (_wdc_)
344: * USB 1.1 ports (2) (_ohci_)
345: * Watchdog timer on CPLD (_tspld_)
346: * TMP124 high precision temperature sensor via sysctl
347: * 64Hz system clock from on-CPU timers (_epclk_)
348: * HD44780 2x24 text mode LCD (_tslcd_)
349: * 4x4 16 button matrix keypad (_wskbd_)
350: * TS-5620 battery backed RTC daughter-card (_tsrtc_)
351: * 1,2,4 port serial TS-SER daughter cards (_com_)
352: * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_)
353: * Other devices inserted into the PC/104 (_isa_) expansion slot
1.1 mspo 354:
355: """
1.13 wiki 356: additional="""
1.22 wiki 357: * The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/)
1.36 sevan 358: * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005.
1.1 mspo 359: """
360: ]]
361: [[!tag tier1port]]
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