Annotation of wikisrc/ports/evbarm.mdwn, revision 1.58
1.1 mspo 1: [[!template id=port
2: port="evbarm"
1.6 mspo 3: port_alt="arm"
1.49 leot 4: port_var1="earm"
5: port_var2="earmeb"
6: port_var3="earmv6hf"
7: port_var4="earmv7hf"
8: port_var5="earmv7hfeb"
9: port_var_install_notes="evbarm-earm"
1.48 martin 10: cur_rel="8.0"
11: future_rel="9.0"
12: changes_cur="8.0"
13: changes_future="9.0"
1.1 mspo 14: thumbnail="http://www.netbsd.org/images/ports/evbarm/adi_brh.gif"
15: about="""
16: NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping
17: boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also
18: supports some specific embedded system products based on prototype board
19: designs.
20:
1.7 mspo 21: Matt Thomas is the maintainer of NetBSD/evbarm.
1.27 wiki 22:
1.42 gdt 23: ### CPU types
24:
1.57 gdt 25: The evbarm port can be built with a variety of CPU options, corresponding to the
26: [large array of ARM CPU architectures](https://en.wikipedia.org/wiki/ARM_architecture#Cores).
27: There are
1.56 gdt 28: four main variables: the word size, the instruction set, the
29: endianness, and whether there is hardware floating point. By default
30: the CPU type is "earm", and this implies aarch32 (32-bit), \todo cpu
31: architecture, little endian (el when explicitly stated), and soft
1.58 ! gdt 32: (Emulated) floating point. Another example, suitable for Raspberry PI
1.56 gdt 33: 2, is earmv7hf, which is aarch32, the v7 instruction set, little
34: endian, and hardware floating point.
1.42 gdt 35:
36: Typically, various boards are best compiled with a CPU type that
37: matches the board's CPU and floating point support, but generally a
38: lower CPU instruction set version is workable on a newer board. See
39: build.sh and look for aliases for the evbarm port.
40:
1.56 gdt 41: Through NetBSD 8, the evbarm port has supported exclusively the
42: aarch32 (32-bit CPU) sub-family of the ARM architecture. Some
43: processors, such as many supporting the armv8 CPU architecture, also
44: support a 64-bit instruction set, referred to as aarch64. This is
45: sometimes referred to as a distinct port, [[NetBSD/aarch64|aarch64]],
46: with code in src/sys/arch/aarch64, but it is built as the evbarm port
47: with aarch64 cpu type, and available as the alias evbarm64.
1.50 gdt 48:
1.58 ! gdt 49: Note that MACHINE_ARCH=aarch64 currently refers to the A64 instruction
! 50: set and the aarch64 architecture, built for the armv8 architecture.
! 51: (Note also that armv8 is the first architecture to support aarch64, so
! 52: this will not be an issue until at least armv9.)
! 53:
! 54: #### ABI types
! 55:
! 56: There are two basic ABIs on ARM. One, called oabi, assumed a
! 57: particular kind of hardware floating point (FPA). This results in
! 58: faulting any floating-point instructions for kernel emulation on a
! 59: vast number of CPus, which is very slow. A newer one, called eabi,
! 60: has two variants. Both have stricter alignment rules, tending to 8
! 61: byte rather than 4 bytes for 8-byte types (but actually read the specs
! 62: if you care). The one without "hf" emulates floating point without
! 63: causing traps/emulation, and "hf" uses VFP instructions, which are
! 64: present on modern CPUs. See the
! 65: [TS-7200](https://wiki.embeddedarm.com/wiki/EABI_vs_OABI) and
! 66: [Debian](https://wiki.debian.org/ArmEabiPort) documentation.
! 67:
! 68: Now, EABI is normal, and OABI is crufty. The only real reason NetBSD
! 69: retains OABI support is binary compatibility with older releases. The
! 70: "arm" and "armeb" MACHINE_ARCH targets are OABI; the rest of the
! 71: targets, all having "earm" are EABI.
! 72:
! 73: \todo CHECK THIS: The "aarch64" MACHINE_ARCH target is an EABI variant.
! 74:
! 75: ### Relationship of MACHINE_ARCH to official ARM terminology
! 76:
! 77: Note that these are all little endian, and have big endian variants
! 78: with a "eb" sufix.
! 79:
! 80: [[!table data="""
! 81: MACHINE_ARCH | 32/64 | ARM architecture version | ABI
! 82: arm | 32 | ? | oabi
! 83: earm | 32 | armv4 (effectively an alias) | eabi
! 84: earmv4 | 32 | armv4 (no thumb, so ok on strongarm) | eabi
! 85: earmv5 | 32 | armv5t | eabi
! 86: earmv6 | 32 | armv6 | eabi
! 87: earmv7 | 32 | armv7 | eabi
! 88: aarch64 | 64 | armv8 | \todo ? eabi
! 89: """]]
! 90:
! 91: \todo Explain why, if we have armv4, and this is confusing, we still have earm as a MACHINE_ARCH.
! 92:
! 93: \todo Explain if MACHINE_ARCH values correspond to a particular
! 94: argument to some CPU selection command in gcc (and/or clang).
! 95:
1.43 gdt 96: ### Kernels and userland
97:
98: The evbarm userland can be used on any system that can run code of the
99: CPU type used for the build. Typically, a particular board requires a
100: kernel for that board.
101:
1.51 gdt 102: ### anita and qemu
103:
1.52 gdt 104: anita can be used to test builds. (In addition to anita, install qemu and dtb-arm-vexpress from pkgsrc.) The release subdirectory should follow the naming convention on the autobuild cluster, used below.
1.54 gdt 105:
1.55 gson 106: - evbarm-earmv7hf uses "qemu-system-arm -M vexpress-a15"
107: - evbarm-aarch64 uses "qemu-system-aarch64 -M virt"
1.53 gdt 108: - Information on how to test emulated versions of other specific hardware is welcome.
1.51 gdt 109:
1.27 wiki 110: ### Board specific information
1.38 wiki 111: - [[Allwinner sunxi family SoCs|Allwinner]]
1.27 wiki 112: - [[BeagleBone and BeagleBone Black|BeagleBone]]
1.41 wiki 113: - [[NVIDIA Tegra|Tegra]]
1.27 wiki 114: - [[ODROID C1 and C1+|ODROID-C1]]
1.40 gdt 115: - [[Raspberry Pi 1, 2 and 3|Raspberry Pi]]
1.27 wiki 116:
1.1 mspo 117: """
1.27 wiki 118:
1.1 mspo 119: supported_hardware="""
1.11 wiki 120:
1.18 wiki 121: **NOTE**: This list is incomplete. For a full list of configurations, please see the [evbarm kernel configs](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/evbarm/conf/) directory in CVS.
122:
1.11 wiki 123: [[!toc startlevel=3]]
124:
1.36 sevan 125: ### ADI Engineering **BRH** ("Big Red Head")
1.12 wiki 126:
127: The BRH is an evaluation and development platform for the Intel **i80200**
128: XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion
129: Chip"). The BRH is capable of both big- and little-endian operation, although
1.21 snj 130: NetBSD currently only supports little-endian operation.
1.12 wiki 131:
132: Support for the BRH was written by Jason Thorpe, and contributed by Wasabi
133: Systems, Inc.
134:
135: * On-board NS16550-compatible serial ports (_com_)
136: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
137: * On-chip timer on the BECC (used as system clock)
138: * Other devices inserted into the PCI slot
1.5 wiki 139:
1.12 wiki 140: The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are
141: limited to 64M due to the layout of the PCI DMA windows. Users of these
142: systems should obtain an FPGA upgrade from ADI to revision 8 or later of the
143: BECC.
1.5 wiki 144:
1.39 wiki 145: ### Allwinner Technology
1.15 wiki 146: Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31.
1.10 wiki 147:
1.12 wiki 148: ### Arcom **Viper**
1.1 mspo 149:
1.12 wiki 150: The Arcom Viper is a single board computer based on the PXA255 XScale
151: processor.
1.1 mspo 152:
1.12 wiki 153: Support for the Arcom Viper was written by Antti Kantee.
1.1 mspo 154:
1.12 wiki 155: * On-chip timers (_saost_ used as system clock)
156: * On-chip serial ports (_com_)
1.36 sevan 157: * On-board SMC91C111 ethernet (_sm_)
1.1 mspo 158:
1.3 wiki 159: ### ARM, Ltd. **Integrator**
1.1 mspo 160:
161: The Integrator/AP is an ATX form-factor board that is used for development of
162: ARM processor-based designs. It supports up to four processors on plug-in core
163: modules, and provides clocks, a bus interface, and interrupt support. The
164: Integrator/AP also supports logic modules which provide additional
165: peripherals, and can accommodate up to three PCI expansion cards. The
166: Integrator/AP can also be inserted into a CompactPCI backplane.
167:
168: Support for the Integrator was written by Richard Earnshaw, and contributed by
169: ARM, Ltd.
170:
1.2 mspo 171: * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_)
172: * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_)
1.23 ryoon 173: * PrimeCell PL181 MultiMedia Card Interface
1.2 mspo 174: * Other devices inserted into the PCI expansion slots
1.1 mspo 175:
1.12 wiki 176: ### Atmark Techno **Armadillo-9**
177:
178: The Armadillo-9 is a single board computer based on the EP9315 processor.
179:
180: Support for the Armadillo-9 was written by Katsuomi Hamajima.
181:
182: * On-CPU RS232 UARTs (2) (_epcom_)
183: * On-CPU 10/100 Ethernet MAC (_epe_)
184: * system clock from on-CPU timers (_epclk_)
185: * CompactFlash socket (_eppcic_)
186: * USB 1.1 ports (_ohci_)
187:
1.19 wiki 188: ### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM**
189: The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org.
190:
191: ### BeagleBoard.org **BeagleBone** and **BeagleBone Black**
192: The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org.
1.12 wiki 193:
194: ### Gumstix, Inc. **gumstix**
195:
196: The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard
197: based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now.
198:
199: Support for the gumstix was written by KIYOHARA Takashi.
200:
201: * basix
202: * cfstix
203: * etherstix
204: * netCF
205: * netDUO
206: * netDUO-mmc
1.36 sevan 207: * netMMC
1.12 wiki 208:
209: When booting, it is necessary to set these with u-boot dynamically.
210:
211: <pre> > go 0xa0200000 busheader=basix</pre>
212:
213: * audiostix
214: * console-st (waysmall - STUART)
215: * console-hw (waysmall)
216: * GPSstix (GPS not test)
217: * tweener
218:
1.26 wiki 219: ### Hardkernel ODROID-C1 and ODROID-C1+
1.16 wiki 220:
221: The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd.
222:
1.36 sevan 223: ### Intel **DBPXA250** ("Lubbock")
1.12 wiki 224:
225: DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the
226: Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm).
227:
228: Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed
229: by Genetec Corp.
230:
231: * On-chip timers (_saost_ used as system clock)
232: * On-chip 2 serial port (_com_)
233: * On-board SMC91C96 ethernet (_sm_)
234: * On-board SA-1111 StrongArm companion chip (_sacc_)
235: * PS/2 keyboard (_pckbd_)
236: * 640x480 LCD (_lcd_)
237: * PCMCIA and CF card slots
238:
1.3 wiki 239: ### Intel **IQ31244**
1.1 mspo 240:
241: The IQ31244 is a development platform for the Intel **IOP321** I/O Processor
242: chipset and the Intel **i31244** SATA controller.
243:
244: Initial support for the IQ31244 was written by Jason Thorpe, and contributed
245: by Wasabi Systems, Inc.
246:
1.2 mspo 247: * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_)
248: * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_)
249: * On-board NS16550-compatible serial port (_com_)
250: * On-chip timers (TMR0 used as system clock)
251: * On-chip Application Accelerator Unit (_iopaau_)
252: * On-chip watchdog timer (_iopwdog_)
253: * On-board compact flash reader (_wdc_)
254: * Other devices inserted into the PCI-X expansion slot
1.1 mspo 255:
1.3 wiki 256: ### Intel **IQ80310**
1.1 mspo 257:
258: The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor
259: chipset, which is comprised of the i80200 XScale processor and the i80312 I/O
260: Companion chip.
261:
262: Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and
263: contributed by Wasabi Systems, Inc.
264:
1.2 mspo 265: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
266: * On-board timer in the CPLD (used as system clock)
267: * On-board NS16550-compatible serial ports (_com_)
268: * Other devices inserted into the PCI expansion slots
1.1 mspo 269:
1.3 wiki 270: ### Intel **IQ80321**
1.1 mspo 271:
272: The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor
273: (i80321 XScale processor).
274:
275: Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi
276: Systems, Inc.
277:
1.2 mspo 278: * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_)
279: * On-board NS16550-compatible serial port (_com_)
280: * On-chip timers (TMR0 used as system clock)
281: * On-chip Application Accelerator Unit (_iopaau_)
282: * On-chip watchdog timer (_iopwdog_)
283: * Other devices inserted into the PCI-X expansion slots
1.1 mspo 284:
1.3 wiki 285: ### Intel **IXM1200**
1.1 mspo 286:
287: The IXM1200 is the reference platform for the Intel **IXP1200** Network
288: Processor.
289:
290: Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki.
291:
1.2 mspo 292: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
293: * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_)
294: * On-chip timers (ixpclk0 used as system clock)
295: * On-chip serial port (_ixpcom_)
1.1 mspo 296:
1.36 sevan 297: ### NOVATEC **NTNP425B** ("ZAO425")
1.12 wiki 298:
299: NTNP425B is an evaluation and development platform for the Intel **IXP425**
300: XScale Core NetworkProcessor. NTNP425B is based on the reference board of
301: Intel **IXDP425**. The **NTNP425B** is capable of only big-endian operation.
302: Since the library for micro-engine(NPE) offered from Intel Corp. is big-
303: endian. More information about the **NTNP425B** can be found on [product
304: catalogue of **NTNP425B**(2.5MB,PDF
305: file)](http://www.novatec.co.jp/NTNP425BBrochureE.pdf).
306:
307: Support for the NTNP425B was written by Ichiro FUKUHARA.
308:
309: * On-chip timers (_ixpclk0_ used as system clock)
310: * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_)
311: * Other devices inserted into the PCI/mPCI slot
312: * On-chip watchdog timer (_ixpwdog_)
313:
1.20 wiki 314: ### NVIDIA Tegra K1
1.37 snj 315: Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and
316: 8.0_BETA. The Jetson TK1 board is currently supported.
1.20 wiki 317:
1.40 gdt 318: ### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3**
319: The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported.
1.12 wiki 320:
1.3 wiki 321: ### Samsung **SMDK2410**
1.1 mspo 322:
323: The SMDK2410 is the reference platform for the Samsung **S3C2410** processor,
324: which has an ARM920T core.
325:
326: More information on the S3C2410 can be found at [Samsung Electronics web page]
327: (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/
328: ARM9Series/S3C2410/S3C2410.htm).
329:
330: Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by
331: Genetec Corp.
332:
1.2 mspo 333: * On-chip serial ports (_sscom_)
334: * On-chip USB host controller (_ohc_)
335: * On-chip timers (used as system clock)
336: * On-chip SPI (_ssspi_, used for other on-board devices)
337: * 240x320 TFT LCD (_lcd_)
338: * keyboard. (_sskbd_)
1.1 mspo 339:
1.3 wiki 340: ### Samsung **SMDK2800**
1.1 mspo 341:
342: The SMDK2800 is the reference platform for the **Samsung S3C2800** processor,
343: which has an ARM920T core.
344:
345: S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots.
346:
347: Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by
348: Fujitsu Component Ltd., and Genetec Corp.
349:
1.2 mspo 350: * On-chip serial ports (_sscom_)
351: * On-chip Host-PCI bridge (_sspci_)
352: * On-chip timers (used as system clock)
1.36 sevan 353: * Other devices inserted into the PCI slots
1.1 mspo 354:
1.12 wiki 355: ### Team ASA, Inc. **Npwr**
1.1 mspo 356:
1.12 wiki 357: The Npwr is an IOP310-based design targeted at the network-attached storage
358: space. The Npwr comes in several configurations (single or dual Gigabit
359: Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board
360: or as a small server appliance. More information on the Npwr can be found at
361: the [Team ASA web page](http://www.teamasa.com/).
1.1 mspo 362:
1.12 wiki 363: Support for the Npwr was written by Jason Thorpe and Allen Briggs, and
364: contributed by Wasabi Systems, Inc.
1.1 mspo 365:
1.12 wiki 366: * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_)
367: * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_)
368: * On-board timer in the CPLD (used as system clock)
369: * On-board NS16550-compatible serial port (_com_)
1.1 mspo 370:
1.12 wiki 371: ### Technologic Systems **TS-7200**
1.1 mspo 372:
1.12 wiki 373: The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer
374: intended as a general purpose core for real embedded applications. The TS-7200
375: uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa)
376: bus and can either boot to CompactFlash or onboard flash. The board also has
377: general purpose digital IO and optional multichannel analog-to-digital
378: converters. More information on the TS-7200 can be found at [Technologic
379: Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html).
1.1 mspo 380:
1.12 wiki 381: Support for the TS-7200 was written by Jesse Off
1.1 mspo 382:
1.12 wiki 383: * On-CPU RS232 UARTs (2) (_epcom_)
384: * On-CPU 10/100 Ethernet MAC (_epe_)
385: * CompactFlash socket (_wdc_)
386: * USB 1.1 ports (2) (_ohci_)
387: * Watchdog timer on CPLD (_tspld_)
388: * TMP124 high precision temperature sensor via sysctl
389: * 64Hz system clock from on-CPU timers (_epclk_)
390: * HD44780 2x24 text mode LCD (_tslcd_)
391: * 4x4 16 button matrix keypad (_wskbd_)
392: * TS-5620 battery backed RTC daughter-card (_tsrtc_)
393: * 1,2,4 port serial TS-SER daughter cards (_com_)
394: * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_)
395: * Other devices inserted into the PC/104 (_isa_) expansion slot
1.1 mspo 396:
397: """
1.13 wiki 398: additional="""
1.22 wiki 399: * The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/)
1.36 sevan 400: * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005.
1.1 mspo 401: """
402: ]]
403: [[!tag tier1port]]
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