Annotation of wikisrc/ports/evbarm.mdwn, revision 1.57
1.1 mspo 1: [[!template id=port
2: port="evbarm"
1.6 mspo 3: port_alt="arm"
1.49 leot 4: port_var1="earm"
5: port_var2="earmeb"
6: port_var3="earmv6hf"
7: port_var4="earmv7hf"
8: port_var5="earmv7hfeb"
9: port_var_install_notes="evbarm-earm"
1.48 martin 10: cur_rel="8.0"
11: future_rel="9.0"
12: changes_cur="8.0"
13: changes_future="9.0"
1.1 mspo 14: thumbnail="http://www.netbsd.org/images/ports/evbarm/adi_brh.gif"
15: about="""
16: NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping
17: boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also
18: supports some specific embedded system products based on prototype board
19: designs.
20:
1.7 mspo 21: Matt Thomas is the maintainer of NetBSD/evbarm.
1.27 wiki 22:
1.42 gdt 23: ### CPU types
24:
1.57 ! gdt 25: The evbarm port can be built with a variety of CPU options, corresponding to the
! 26: [large array of ARM CPU architectures](https://en.wikipedia.org/wiki/ARM_architecture#Cores).
! 27: There are
1.56 gdt 28: four main variables: the word size, the instruction set, the
29: endianness, and whether there is hardware floating point. By default
30: the CPU type is "earm", and this implies aarch32 (32-bit), \todo cpu
31: architecture, little endian (el when explicitly stated), and soft
1.43 gdt 32: (emulated) floating point. Another example, suitable for Raspberry PI
1.56 gdt 33: 2, is earmv7hf, which is aarch32, the v7 instruction set, little
34: endian, and hardware floating point.
1.42 gdt 35:
36: Typically, various boards are best compiled with a CPU type that
37: matches the board's CPU and floating point support, but generally a
38: lower CPU instruction set version is workable on a newer board. See
39: build.sh and look for aliases for the evbarm port.
40:
1.56 gdt 41: Through NetBSD 8, the evbarm port has supported exclusively the
42: aarch32 (32-bit CPU) sub-family of the ARM architecture. Some
43: processors, such as many supporting the armv8 CPU architecture, also
44: support a 64-bit instruction set, referred to as aarch64. This is
45: sometimes referred to as a distinct port, [[NetBSD/aarch64|aarch64]],
46: with code in src/sys/arch/aarch64, but it is built as the evbarm port
47: with aarch64 cpu type, and available as the alias evbarm64.
1.50 gdt 48:
1.43 gdt 49: ### Kernels and userland
50:
51: The evbarm userland can be used on any system that can run code of the
52: CPU type used for the build. Typically, a particular board requires a
53: kernel for that board.
54:
1.51 gdt 55: ### anita and qemu
56:
1.52 gdt 57: anita can be used to test builds. (In addition to anita, install qemu and dtb-arm-vexpress from pkgsrc.) The release subdirectory should follow the naming convention on the autobuild cluster, used below.
1.54 gdt 58:
1.55 gson 59: - evbarm-earmv7hf uses "qemu-system-arm -M vexpress-a15"
60: - evbarm-aarch64 uses "qemu-system-aarch64 -M virt"
1.53 gdt 61: - Information on how to test emulated versions of other specific hardware is welcome.
1.51 gdt 62:
1.27 wiki 63: ### Board specific information
1.38 wiki 64: - [[Allwinner sunxi family SoCs|Allwinner]]
1.27 wiki 65: - [[BeagleBone and BeagleBone Black|BeagleBone]]
1.41 wiki 66: - [[NVIDIA Tegra|Tegra]]
1.27 wiki 67: - [[ODROID C1 and C1+|ODROID-C1]]
1.40 gdt 68: - [[Raspberry Pi 1, 2 and 3|Raspberry Pi]]
1.27 wiki 69:
1.1 mspo 70: """
1.27 wiki 71:
1.1 mspo 72: supported_hardware="""
1.11 wiki 73:
1.18 wiki 74: **NOTE**: This list is incomplete. For a full list of configurations, please see the [evbarm kernel configs](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/evbarm/conf/) directory in CVS.
75:
1.11 wiki 76: [[!toc startlevel=3]]
77:
1.36 sevan 78: ### ADI Engineering **BRH** ("Big Red Head")
1.12 wiki 79:
80: The BRH is an evaluation and development platform for the Intel **i80200**
81: XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion
82: Chip"). The BRH is capable of both big- and little-endian operation, although
1.21 snj 83: NetBSD currently only supports little-endian operation.
1.12 wiki 84:
85: Support for the BRH was written by Jason Thorpe, and contributed by Wasabi
86: Systems, Inc.
87:
88: * On-board NS16550-compatible serial ports (_com_)
89: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
90: * On-chip timer on the BECC (used as system clock)
91: * Other devices inserted into the PCI slot
1.5 wiki 92:
1.12 wiki 93: The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are
94: limited to 64M due to the layout of the PCI DMA windows. Users of these
95: systems should obtain an FPGA upgrade from ADI to revision 8 or later of the
96: BECC.
1.5 wiki 97:
1.39 wiki 98: ### Allwinner Technology
1.15 wiki 99: Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31.
1.10 wiki 100:
1.12 wiki 101: ### Arcom **Viper**
1.1 mspo 102:
1.12 wiki 103: The Arcom Viper is a single board computer based on the PXA255 XScale
104: processor.
1.1 mspo 105:
1.12 wiki 106: Support for the Arcom Viper was written by Antti Kantee.
1.1 mspo 107:
1.12 wiki 108: * On-chip timers (_saost_ used as system clock)
109: * On-chip serial ports (_com_)
1.36 sevan 110: * On-board SMC91C111 ethernet (_sm_)
1.1 mspo 111:
1.3 wiki 112: ### ARM, Ltd. **Integrator**
1.1 mspo 113:
114: The Integrator/AP is an ATX form-factor board that is used for development of
115: ARM processor-based designs. It supports up to four processors on plug-in core
116: modules, and provides clocks, a bus interface, and interrupt support. The
117: Integrator/AP also supports logic modules which provide additional
118: peripherals, and can accommodate up to three PCI expansion cards. The
119: Integrator/AP can also be inserted into a CompactPCI backplane.
120:
121: Support for the Integrator was written by Richard Earnshaw, and contributed by
122: ARM, Ltd.
123:
1.2 mspo 124: * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_)
125: * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_)
1.23 ryoon 126: * PrimeCell PL181 MultiMedia Card Interface
1.2 mspo 127: * Other devices inserted into the PCI expansion slots
1.1 mspo 128:
1.12 wiki 129: ### Atmark Techno **Armadillo-9**
130:
131: The Armadillo-9 is a single board computer based on the EP9315 processor.
132:
133: Support for the Armadillo-9 was written by Katsuomi Hamajima.
134:
135: * On-CPU RS232 UARTs (2) (_epcom_)
136: * On-CPU 10/100 Ethernet MAC (_epe_)
137: * system clock from on-CPU timers (_epclk_)
138: * CompactFlash socket (_eppcic_)
139: * USB 1.1 ports (_ohci_)
140:
1.19 wiki 141: ### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM**
142: The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org.
143:
144: ### BeagleBoard.org **BeagleBone** and **BeagleBone Black**
145: The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org.
1.12 wiki 146:
147: ### Gumstix, Inc. **gumstix**
148:
149: The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard
150: based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now.
151:
152: Support for the gumstix was written by KIYOHARA Takashi.
153:
154: * basix
155: * cfstix
156: * etherstix
157: * netCF
158: * netDUO
159: * netDUO-mmc
1.36 sevan 160: * netMMC
1.12 wiki 161:
162: When booting, it is necessary to set these with u-boot dynamically.
163:
164: <pre> > go 0xa0200000 busheader=basix</pre>
165:
166: * audiostix
167: * console-st (waysmall - STUART)
168: * console-hw (waysmall)
169: * GPSstix (GPS not test)
170: * tweener
171:
1.26 wiki 172: ### Hardkernel ODROID-C1 and ODROID-C1+
1.16 wiki 173:
174: The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd.
175:
1.36 sevan 176: ### Intel **DBPXA250** ("Lubbock")
1.12 wiki 177:
178: DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the
179: Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm).
180:
181: Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed
182: by Genetec Corp.
183:
184: * On-chip timers (_saost_ used as system clock)
185: * On-chip 2 serial port (_com_)
186: * On-board SMC91C96 ethernet (_sm_)
187: * On-board SA-1111 StrongArm companion chip (_sacc_)
188: * PS/2 keyboard (_pckbd_)
189: * 640x480 LCD (_lcd_)
190: * PCMCIA and CF card slots
191:
1.3 wiki 192: ### Intel **IQ31244**
1.1 mspo 193:
194: The IQ31244 is a development platform for the Intel **IOP321** I/O Processor
195: chipset and the Intel **i31244** SATA controller.
196:
197: Initial support for the IQ31244 was written by Jason Thorpe, and contributed
198: by Wasabi Systems, Inc.
199:
1.2 mspo 200: * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_)
201: * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_)
202: * On-board NS16550-compatible serial port (_com_)
203: * On-chip timers (TMR0 used as system clock)
204: * On-chip Application Accelerator Unit (_iopaau_)
205: * On-chip watchdog timer (_iopwdog_)
206: * On-board compact flash reader (_wdc_)
207: * Other devices inserted into the PCI-X expansion slot
1.1 mspo 208:
1.3 wiki 209: ### Intel **IQ80310**
1.1 mspo 210:
211: The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor
212: chipset, which is comprised of the i80200 XScale processor and the i80312 I/O
213: Companion chip.
214:
215: Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and
216: contributed by Wasabi Systems, Inc.
217:
1.2 mspo 218: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
219: * On-board timer in the CPLD (used as system clock)
220: * On-board NS16550-compatible serial ports (_com_)
221: * Other devices inserted into the PCI expansion slots
1.1 mspo 222:
1.3 wiki 223: ### Intel **IQ80321**
1.1 mspo 224:
225: The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor
226: (i80321 XScale processor).
227:
228: Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi
229: Systems, Inc.
230:
1.2 mspo 231: * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_)
232: * On-board NS16550-compatible serial port (_com_)
233: * On-chip timers (TMR0 used as system clock)
234: * On-chip Application Accelerator Unit (_iopaau_)
235: * On-chip watchdog timer (_iopwdog_)
236: * Other devices inserted into the PCI-X expansion slots
1.1 mspo 237:
1.3 wiki 238: ### Intel **IXM1200**
1.1 mspo 239:
240: The IXM1200 is the reference platform for the Intel **IXP1200** Network
241: Processor.
242:
243: Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki.
244:
1.2 mspo 245: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
246: * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_)
247: * On-chip timers (ixpclk0 used as system clock)
248: * On-chip serial port (_ixpcom_)
1.1 mspo 249:
1.36 sevan 250: ### NOVATEC **NTNP425B** ("ZAO425")
1.12 wiki 251:
252: NTNP425B is an evaluation and development platform for the Intel **IXP425**
253: XScale Core NetworkProcessor. NTNP425B is based on the reference board of
254: Intel **IXDP425**. The **NTNP425B** is capable of only big-endian operation.
255: Since the library for micro-engine(NPE) offered from Intel Corp. is big-
256: endian. More information about the **NTNP425B** can be found on [product
257: catalogue of **NTNP425B**(2.5MB,PDF
258: file)](http://www.novatec.co.jp/NTNP425BBrochureE.pdf).
259:
260: Support for the NTNP425B was written by Ichiro FUKUHARA.
261:
262: * On-chip timers (_ixpclk0_ used as system clock)
263: * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_)
264: * Other devices inserted into the PCI/mPCI slot
265: * On-chip watchdog timer (_ixpwdog_)
266:
1.20 wiki 267: ### NVIDIA Tegra K1
1.37 snj 268: Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and
269: 8.0_BETA. The Jetson TK1 board is currently supported.
1.20 wiki 270:
1.40 gdt 271: ### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3**
272: The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported.
1.12 wiki 273:
1.3 wiki 274: ### Samsung **SMDK2410**
1.1 mspo 275:
276: The SMDK2410 is the reference platform for the Samsung **S3C2410** processor,
277: which has an ARM920T core.
278:
279: More information on the S3C2410 can be found at [Samsung Electronics web page]
280: (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/
281: ARM9Series/S3C2410/S3C2410.htm).
282:
283: Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by
284: Genetec Corp.
285:
1.2 mspo 286: * On-chip serial ports (_sscom_)
287: * On-chip USB host controller (_ohc_)
288: * On-chip timers (used as system clock)
289: * On-chip SPI (_ssspi_, used for other on-board devices)
290: * 240x320 TFT LCD (_lcd_)
291: * keyboard. (_sskbd_)
1.1 mspo 292:
1.3 wiki 293: ### Samsung **SMDK2800**
1.1 mspo 294:
295: The SMDK2800 is the reference platform for the **Samsung S3C2800** processor,
296: which has an ARM920T core.
297:
298: S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots.
299:
300: Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by
301: Fujitsu Component Ltd., and Genetec Corp.
302:
1.2 mspo 303: * On-chip serial ports (_sscom_)
304: * On-chip Host-PCI bridge (_sspci_)
305: * On-chip timers (used as system clock)
1.36 sevan 306: * Other devices inserted into the PCI slots
1.1 mspo 307:
1.12 wiki 308: ### Team ASA, Inc. **Npwr**
1.1 mspo 309:
1.12 wiki 310: The Npwr is an IOP310-based design targeted at the network-attached storage
311: space. The Npwr comes in several configurations (single or dual Gigabit
312: Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board
313: or as a small server appliance. More information on the Npwr can be found at
314: the [Team ASA web page](http://www.teamasa.com/).
1.1 mspo 315:
1.12 wiki 316: Support for the Npwr was written by Jason Thorpe and Allen Briggs, and
317: contributed by Wasabi Systems, Inc.
1.1 mspo 318:
1.12 wiki 319: * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_)
320: * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_)
321: * On-board timer in the CPLD (used as system clock)
322: * On-board NS16550-compatible serial port (_com_)
1.1 mspo 323:
1.12 wiki 324: ### Technologic Systems **TS-7200**
1.1 mspo 325:
1.12 wiki 326: The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer
327: intended as a general purpose core for real embedded applications. The TS-7200
328: uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa)
329: bus and can either boot to CompactFlash or onboard flash. The board also has
330: general purpose digital IO and optional multichannel analog-to-digital
331: converters. More information on the TS-7200 can be found at [Technologic
332: Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html).
1.1 mspo 333:
1.12 wiki 334: Support for the TS-7200 was written by Jesse Off
1.1 mspo 335:
1.12 wiki 336: * On-CPU RS232 UARTs (2) (_epcom_)
337: * On-CPU 10/100 Ethernet MAC (_epe_)
338: * CompactFlash socket (_wdc_)
339: * USB 1.1 ports (2) (_ohci_)
340: * Watchdog timer on CPLD (_tspld_)
341: * TMP124 high precision temperature sensor via sysctl
342: * 64Hz system clock from on-CPU timers (_epclk_)
343: * HD44780 2x24 text mode LCD (_tslcd_)
344: * 4x4 16 button matrix keypad (_wskbd_)
345: * TS-5620 battery backed RTC daughter-card (_tsrtc_)
346: * 1,2,4 port serial TS-SER daughter cards (_com_)
347: * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_)
348: * Other devices inserted into the PC/104 (_isa_) expansion slot
1.1 mspo 349:
350: """
1.13 wiki 351: additional="""
1.22 wiki 352: * The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/)
1.36 sevan 353: * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005.
1.1 mspo 354: """
355: ]]
356: [[!tag tier1port]]
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