Annotation of wikisrc/ports/evbarm.mdwn, revision 1.56
1.1 mspo 1: [[!template id=port
2: port="evbarm"
1.6 mspo 3: port_alt="arm"
1.49 leot 4: port_var1="earm"
5: port_var2="earmeb"
6: port_var3="earmv6hf"
7: port_var4="earmv7hf"
8: port_var5="earmv7hfeb"
9: port_var_install_notes="evbarm-earm"
1.48 martin 10: cur_rel="8.0"
11: future_rel="9.0"
12: changes_cur="8.0"
13: changes_future="9.0"
1.1 mspo 14: thumbnail="http://www.netbsd.org/images/ports/evbarm/adi_brh.gif"
15: about="""
16: NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping
17: boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also
18: supports some specific embedded system products based on prototype board
19: designs.
20:
1.7 mspo 21: Matt Thomas is the maintainer of NetBSD/evbarm.
1.27 wiki 22:
1.42 gdt 23: ### CPU types
24:
25: The evbarm port can be built with a variety of CPU options. There are
1.56 ! gdt 26: four main variables: the word size, the instruction set, the
! 27: endianness, and whether there is hardware floating point. By default
! 28: the CPU type is "earm", and this implies aarch32 (32-bit), \todo cpu
! 29: architecture, little endian (el when explicitly stated), and soft
1.43 gdt 30: (emulated) floating point. Another example, suitable for Raspberry PI
1.56 ! gdt 31: 2, is earmv7hf, which is aarch32, the v7 instruction set, little
! 32: endian, and hardware floating point.
1.42 gdt 33:
34: Typically, various boards are best compiled with a CPU type that
35: matches the board's CPU and floating point support, but generally a
36: lower CPU instruction set version is workable on a newer board. See
37: build.sh and look for aliases for the evbarm port.
38:
1.56 ! gdt 39: Through NetBSD 8, the evbarm port has supported exclusively the
! 40: aarch32 (32-bit CPU) sub-family of the ARM architecture. Some
! 41: processors, such as many supporting the armv8 CPU architecture, also
! 42: support a 64-bit instruction set, referred to as aarch64. This is
! 43: sometimes referred to as a distinct port, [[NetBSD/aarch64|aarch64]],
! 44: with code in src/sys/arch/aarch64, but it is built as the evbarm port
! 45: with aarch64 cpu type, and available as the alias evbarm64.
1.50 gdt 46:
1.43 gdt 47: ### Kernels and userland
48:
49: The evbarm userland can be used on any system that can run code of the
50: CPU type used for the build. Typically, a particular board requires a
51: kernel for that board.
52:
1.51 gdt 53: ### anita and qemu
54:
1.52 gdt 55: anita can be used to test builds. (In addition to anita, install qemu and dtb-arm-vexpress from pkgsrc.) The release subdirectory should follow the naming convention on the autobuild cluster, used below.
1.54 gdt 56:
1.55 gson 57: - evbarm-earmv7hf uses "qemu-system-arm -M vexpress-a15"
58: - evbarm-aarch64 uses "qemu-system-aarch64 -M virt"
1.53 gdt 59: - Information on how to test emulated versions of other specific hardware is welcome.
1.51 gdt 60:
1.27 wiki 61: ### Board specific information
1.38 wiki 62: - [[Allwinner sunxi family SoCs|Allwinner]]
1.27 wiki 63: - [[BeagleBone and BeagleBone Black|BeagleBone]]
1.41 wiki 64: - [[NVIDIA Tegra|Tegra]]
1.27 wiki 65: - [[ODROID C1 and C1+|ODROID-C1]]
1.40 gdt 66: - [[Raspberry Pi 1, 2 and 3|Raspberry Pi]]
1.27 wiki 67:
1.1 mspo 68: """
1.27 wiki 69:
1.1 mspo 70: supported_hardware="""
1.11 wiki 71:
1.18 wiki 72: **NOTE**: This list is incomplete. For a full list of configurations, please see the [evbarm kernel configs](http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/arch/evbarm/conf/) directory in CVS.
73:
1.11 wiki 74: [[!toc startlevel=3]]
75:
1.36 sevan 76: ### ADI Engineering **BRH** ("Big Red Head")
1.12 wiki 77:
78: The BRH is an evaluation and development platform for the Intel **i80200**
79: XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion
80: Chip"). The BRH is capable of both big- and little-endian operation, although
1.21 snj 81: NetBSD currently only supports little-endian operation.
1.12 wiki 82:
83: Support for the BRH was written by Jason Thorpe, and contributed by Wasabi
84: Systems, Inc.
85:
86: * On-board NS16550-compatible serial ports (_com_)
87: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
88: * On-chip timer on the BECC (used as system clock)
89: * Other devices inserted into the PCI slot
1.5 wiki 90:
1.12 wiki 91: The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are
92: limited to 64M due to the layout of the PCI DMA windows. Users of these
93: systems should obtain an FPGA upgrade from ADI to revision 8 or later of the
94: BECC.
1.5 wiki 95:
1.39 wiki 96: ### Allwinner Technology
1.15 wiki 97: Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31.
1.10 wiki 98:
1.12 wiki 99: ### Arcom **Viper**
1.1 mspo 100:
1.12 wiki 101: The Arcom Viper is a single board computer based on the PXA255 XScale
102: processor.
1.1 mspo 103:
1.12 wiki 104: Support for the Arcom Viper was written by Antti Kantee.
1.1 mspo 105:
1.12 wiki 106: * On-chip timers (_saost_ used as system clock)
107: * On-chip serial ports (_com_)
1.36 sevan 108: * On-board SMC91C111 ethernet (_sm_)
1.1 mspo 109:
1.3 wiki 110: ### ARM, Ltd. **Integrator**
1.1 mspo 111:
112: The Integrator/AP is an ATX form-factor board that is used for development of
113: ARM processor-based designs. It supports up to four processors on plug-in core
114: modules, and provides clocks, a bus interface, and interrupt support. The
115: Integrator/AP also supports logic modules which provide additional
116: peripherals, and can accommodate up to three PCI expansion cards. The
117: Integrator/AP can also be inserted into a CompactPCI backplane.
118:
119: Support for the Integrator was written by Richard Earnshaw, and contributed by
120: ARM, Ltd.
121:
1.2 mspo 122: * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_)
123: * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_)
1.23 ryoon 124: * PrimeCell PL181 MultiMedia Card Interface
1.2 mspo 125: * Other devices inserted into the PCI expansion slots
1.1 mspo 126:
1.12 wiki 127: ### Atmark Techno **Armadillo-9**
128:
129: The Armadillo-9 is a single board computer based on the EP9315 processor.
130:
131: Support for the Armadillo-9 was written by Katsuomi Hamajima.
132:
133: * On-CPU RS232 UARTs (2) (_epcom_)
134: * On-CPU 10/100 Ethernet MAC (_epe_)
135: * system clock from on-CPU timers (_epclk_)
136: * CompactFlash socket (_eppcic_)
137: * USB 1.1 ports (_ohci_)
138:
1.19 wiki 139: ### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM**
140: The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org.
141:
142: ### BeagleBoard.org **BeagleBone** and **BeagleBone Black**
143: The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org.
1.12 wiki 144:
145: ### Gumstix, Inc. **gumstix**
146:
147: The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard
148: based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now.
149:
150: Support for the gumstix was written by KIYOHARA Takashi.
151:
152: * basix
153: * cfstix
154: * etherstix
155: * netCF
156: * netDUO
157: * netDUO-mmc
1.36 sevan 158: * netMMC
1.12 wiki 159:
160: When booting, it is necessary to set these with u-boot dynamically.
161:
162: <pre> > go 0xa0200000 busheader=basix</pre>
163:
164: * audiostix
165: * console-st (waysmall - STUART)
166: * console-hw (waysmall)
167: * GPSstix (GPS not test)
168: * tweener
169:
1.26 wiki 170: ### Hardkernel ODROID-C1 and ODROID-C1+
1.16 wiki 171:
172: The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd.
173:
1.36 sevan 174: ### Intel **DBPXA250** ("Lubbock")
1.12 wiki 175:
176: DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the
177: Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm).
178:
179: Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed
180: by Genetec Corp.
181:
182: * On-chip timers (_saost_ used as system clock)
183: * On-chip 2 serial port (_com_)
184: * On-board SMC91C96 ethernet (_sm_)
185: * On-board SA-1111 StrongArm companion chip (_sacc_)
186: * PS/2 keyboard (_pckbd_)
187: * 640x480 LCD (_lcd_)
188: * PCMCIA and CF card slots
189:
1.3 wiki 190: ### Intel **IQ31244**
1.1 mspo 191:
192: The IQ31244 is a development platform for the Intel **IOP321** I/O Processor
193: chipset and the Intel **i31244** SATA controller.
194:
195: Initial support for the IQ31244 was written by Jason Thorpe, and contributed
196: by Wasabi Systems, Inc.
197:
1.2 mspo 198: * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_)
199: * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_)
200: * On-board NS16550-compatible serial port (_com_)
201: * On-chip timers (TMR0 used as system clock)
202: * On-chip Application Accelerator Unit (_iopaau_)
203: * On-chip watchdog timer (_iopwdog_)
204: * On-board compact flash reader (_wdc_)
205: * Other devices inserted into the PCI-X expansion slot
1.1 mspo 206:
1.3 wiki 207: ### Intel **IQ80310**
1.1 mspo 208:
209: The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor
210: chipset, which is comprised of the i80200 XScale processor and the i80312 I/O
211: Companion chip.
212:
213: Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and
214: contributed by Wasabi Systems, Inc.
215:
1.2 mspo 216: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
217: * On-board timer in the CPLD (used as system clock)
218: * On-board NS16550-compatible serial ports (_com_)
219: * Other devices inserted into the PCI expansion slots
1.1 mspo 220:
1.3 wiki 221: ### Intel **IQ80321**
1.1 mspo 222:
223: The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor
224: (i80321 XScale processor).
225:
226: Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi
227: Systems, Inc.
228:
1.2 mspo 229: * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_)
230: * On-board NS16550-compatible serial port (_com_)
231: * On-chip timers (TMR0 used as system clock)
232: * On-chip Application Accelerator Unit (_iopaau_)
233: * On-chip watchdog timer (_iopwdog_)
234: * Other devices inserted into the PCI-X expansion slots
1.1 mspo 235:
1.3 wiki 236: ### Intel **IXM1200**
1.1 mspo 237:
238: The IXM1200 is the reference platform for the Intel **IXP1200** Network
239: Processor.
240:
241: Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki.
242:
1.2 mspo 243: * On-board Intel i82559 Ethernet on the PCI bus (_fxp_)
244: * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_)
245: * On-chip timers (ixpclk0 used as system clock)
246: * On-chip serial port (_ixpcom_)
1.1 mspo 247:
1.36 sevan 248: ### NOVATEC **NTNP425B** ("ZAO425")
1.12 wiki 249:
250: NTNP425B is an evaluation and development platform for the Intel **IXP425**
251: XScale Core NetworkProcessor. NTNP425B is based on the reference board of
252: Intel **IXDP425**. The **NTNP425B** is capable of only big-endian operation.
253: Since the library for micro-engine(NPE) offered from Intel Corp. is big-
254: endian. More information about the **NTNP425B** can be found on [product
255: catalogue of **NTNP425B**(2.5MB,PDF
256: file)](http://www.novatec.co.jp/NTNP425BBrochureE.pdf).
257:
258: Support for the NTNP425B was written by Ichiro FUKUHARA.
259:
260: * On-chip timers (_ixpclk0_ used as system clock)
261: * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_)
262: * Other devices inserted into the PCI/mPCI slot
263: * On-chip watchdog timer (_ixpwdog_)
264:
1.20 wiki 265: ### NVIDIA Tegra K1
1.37 snj 266: Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and
267: 8.0_BETA. The Jetson TK1 board is currently supported.
1.20 wiki 268:
1.40 gdt 269: ### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3**
270: The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported.
1.12 wiki 271:
1.3 wiki 272: ### Samsung **SMDK2410**
1.1 mspo 273:
274: The SMDK2410 is the reference platform for the Samsung **S3C2410** processor,
275: which has an ARM920T core.
276:
277: More information on the S3C2410 can be found at [Samsung Electronics web page]
278: (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/
279: ARM9Series/S3C2410/S3C2410.htm).
280:
281: Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by
282: Genetec Corp.
283:
1.2 mspo 284: * On-chip serial ports (_sscom_)
285: * On-chip USB host controller (_ohc_)
286: * On-chip timers (used as system clock)
287: * On-chip SPI (_ssspi_, used for other on-board devices)
288: * 240x320 TFT LCD (_lcd_)
289: * keyboard. (_sskbd_)
1.1 mspo 290:
1.3 wiki 291: ### Samsung **SMDK2800**
1.1 mspo 292:
293: The SMDK2800 is the reference platform for the **Samsung S3C2800** processor,
294: which has an ARM920T core.
295:
296: S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots.
297:
298: Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by
299: Fujitsu Component Ltd., and Genetec Corp.
300:
1.2 mspo 301: * On-chip serial ports (_sscom_)
302: * On-chip Host-PCI bridge (_sspci_)
303: * On-chip timers (used as system clock)
1.36 sevan 304: * Other devices inserted into the PCI slots
1.1 mspo 305:
1.12 wiki 306: ### Team ASA, Inc. **Npwr**
1.1 mspo 307:
1.12 wiki 308: The Npwr is an IOP310-based design targeted at the network-attached storage
309: space. The Npwr comes in several configurations (single or dual Gigabit
310: Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board
311: or as a small server appliance. More information on the Npwr can be found at
312: the [Team ASA web page](http://www.teamasa.com/).
1.1 mspo 313:
1.12 wiki 314: Support for the Npwr was written by Jason Thorpe and Allen Briggs, and
315: contributed by Wasabi Systems, Inc.
1.1 mspo 316:
1.12 wiki 317: * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_)
318: * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_)
319: * On-board timer in the CPLD (used as system clock)
320: * On-board NS16550-compatible serial port (_com_)
1.1 mspo 321:
1.12 wiki 322: ### Technologic Systems **TS-7200**
1.1 mspo 323:
1.12 wiki 324: The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer
325: intended as a general purpose core for real embedded applications. The TS-7200
326: uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa)
327: bus and can either boot to CompactFlash or onboard flash. The board also has
328: general purpose digital IO and optional multichannel analog-to-digital
329: converters. More information on the TS-7200 can be found at [Technologic
330: Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html).
1.1 mspo 331:
1.12 wiki 332: Support for the TS-7200 was written by Jesse Off
1.1 mspo 333:
1.12 wiki 334: * On-CPU RS232 UARTs (2) (_epcom_)
335: * On-CPU 10/100 Ethernet MAC (_epe_)
336: * CompactFlash socket (_wdc_)
337: * USB 1.1 ports (2) (_ohci_)
338: * Watchdog timer on CPLD (_tspld_)
339: * TMP124 high precision temperature sensor via sysctl
340: * 64Hz system clock from on-CPU timers (_epclk_)
341: * HD44780 2x24 text mode LCD (_tslcd_)
342: * 4x4 16 button matrix keypad (_wskbd_)
343: * TS-5620 battery backed RTC daughter-card (_tsrtc_)
344: * 1,2,4 port serial TS-SER daughter cards (_com_)
345: * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_)
346: * Other devices inserted into the PC/104 (_isa_) expansion slot
1.1 mspo 347:
348: """
1.13 wiki 349: additional="""
1.22 wiki 350: * The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/)
1.36 sevan 351: * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005.
1.1 mspo 352: """
353: ]]
354: [[!tag tier1port]]
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