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version 1.1, 2012/04/29 13:46:32
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version 1.85, 2020/02/15 08:00:03
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| [[!template id=port |
[[!template id=port |
| port="evbarm" |
port="evbarm" |
| cur_rel="5.1.2" |
port_alt="arm" |
| future_rel="6.0" |
port_var1="earm" |
| changes_cur="5.0" |
port_var2="earmeb" |
| changes_future="6.0" |
port_var3="earmv6hf" |
| thumbnail="http://www.netbsd.org/images/ports/evbarm/adi_brh.gif" |
port_var4="earmv7hf" |
| |
port_var5="earmv7hfeb" |
| |
port_var6="aarch64" |
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port_var_install_notes="evbarm-earm" |
| |
cur_rel="9.0" |
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future_rel="10.0" |
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changes_cur="9.0" |
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changes_future="10.0" |
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thumbnail="//www.netbsd.org/images/ports/evbarm/adi_brh.gif" |
| about=""" |
about=""" |
| NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping |
NetBSD/evbarm is the port of NetBSD to various evaluation and prototyping |
| boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also |
boards based on CPUs implementing the ARM architecture. NetBSD/evbarm also |
| supports some specific embedded system products based on prototype board |
supports some specific embedded system products based on prototype board |
| designs. |
designs. |
| |
|
| Jason Thorpe is the maintainer of NetBSD/evbarm. |
### CPU types |
| |
|
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The evbarm port can be built with a variety of CPU options, corresponding to the |
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[large array of ARM CPU architectures](https://en.wikipedia.org/wiki/ARM_architecture#Cores). |
| |
There are |
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four main variables: the word size, the instruction set, the |
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endianness, and whether there is hardware floating point. By default |
| |
the CPU type is "earm", and this implies aarch32 (32-bit), earmv5 cpu |
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architecture, little endian (el when explicitly stated), and soft |
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(Emulated) floating point. Another example, suitable for Raspberry PI |
| |
2, is earmv7hf, which is aarch32, the v7 instruction set, little |
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endian, and hardware floating point. |
| |
|
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Typically, various boards are best compiled with a CPU type that |
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matches the board's CPU and floating point support, but generally a |
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lower CPU instruction set version is workable on a newer board. See |
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build.sh and look for aliases for the evbarm port. |
| |
|
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Through NetBSD 8, the evbarm port has supported exclusively the |
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aarch32 (32-bit CPU) sub-family of the ARM architecture. Some |
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processors, such as many supporting the armv8 CPU architecture, also |
| |
support a 64-bit instruction set, referred to as aarch64. This is |
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sometimes referred to as a distinct port, [[NetBSD/aarch64|aarch64]], |
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with code in src/sys/arch/aarch64, but it is built as the evbarm port |
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with aarch64 cpu type, and available as the alias evbarm64. |
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|
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Note that MACHINE_ARCH=aarch64 currently refers to the A64 instruction |
| |
set and the aarch64 architecture, built for the armv8 architecture. |
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(Note also that armv8 is the first architecture to support aarch64, so |
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this will not be an issue until at least armv9.) |
| |
|
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### QEMU |
| |
|
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See the [[NetBSD/evbarm under QEMU|qemu_arm]] page for instructions on how to get started with QEMU. |
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|
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### anita |
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|
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anita can be used to test builds. (In addition to anita, install qemu and dtb-arm-vexpress from pkgsrc.) The release subdirectory should follow the naming convention on the autobuild cluster, used below. |
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|
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- evbarm-earmv7hf uses "qemu-system-arm -M vexpress-a15" |
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- evbarm-aarch64 uses "qemu-system-aarch64 -M virt" |
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- Information on how to test emulated versions of other specific hardware is welcome. |
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|
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### armbsd.org builds |
| |
|
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NetBSD developer Jared McNeill provides [builds of NetBSD 9 and -current for a vast variety of hardware.](https://www.armbsd.org/) In addition to the standard build, these images have board-specific U-Boot contents. See also /usr/pkgsrc/sysutils/u-boot*. |
| |
|
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### Board specific information (often including installation information) |
| |
- [[Allwinner sunxi family SoCs|Allwinner]] |
| |
- [[BeagleBone, BeagleBone Black, and PocketBeagle|BeagleBone]] |
| |
- [[NVIDIA Tegra|Tegra]] |
| |
- [[ODROID C1 and C1+|ODROID-C1]] |
| |
- [[Raspberry Pi 1, 2 and 3|Raspberry Pi]] |
| |
- [[RockChip SoCs|RockChip]] |
| |
|
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### SSH configuration for installtion |
| |
|
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The default configuration will connect to the local network via DHCP and |
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run an SSH server. In order to use the SSH server, we must configure |
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users. This can be done by writing to the SD card's MS-DOS partition. |
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|
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Create a creds.txt file and use: |
| |
|
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useradd user password |
| |
|
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<!--TODO: Additional configuration options are available on creds_msdos.8--> |
| |
|
| """ |
""" |
| supported_hardware=""" |
supported_hardware=""" |
| * Technologic Systems **TS-7200** |
|
| |
|
| The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer |
**NOTE**: This list is incomplete. For a full list of boards, please see the [GENERIC DTS files](http://cvsweb.netbsd.org/bsdweb.cgi/~checkout~/src/sys/arch/evbarm/conf/GENERIC). |
| intended as a general purpose core for real embedded applications. The TS-7200 |
|
| uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa) |
|
| bus and can either boot to CompactFlash or onboard flash. The board also has |
|
| general purpose digital IO and optional multichannel analog-to-digital |
|
| converters. More information on the TS-7200 can be found at [Technologic |
|
| Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html). |
|
| |
|
| Support for the TS-7200 was written by Jesse Off |
[[!toc startlevel=3]] |
| |
|
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### ADI Engineering **BRH** ("Big Red Head") |
| |
|
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The BRH is an evaluation and development platform for the Intel **i80200** |
| |
XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion |
| |
Chip"). The BRH is capable of both big- and little-endian operation, although |
| |
NetBSD currently only supports little-endian operation. |
| |
|
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Support for the BRH was written by Jason Thorpe, and contributed by Wasabi |
| |
Systems, Inc. |
| |
|
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* On-board NS16550-compatible serial ports (_com_) |
| |
* On-board Intel i82559 Ethernet on the PCI bus (_fxp_) |
| |
* On-chip timer on the BECC (used as system clock) |
| |
* Other devices inserted into the PCI slot |
| |
|
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The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are |
| |
limited to 64M due to the layout of the PCI DMA windows. Users of these |
| |
systems should obtain an FPGA upgrade from ADI to revision 8 or later of the |
| |
BECC. |
| |
|
| * On-CPU RS232 UARTs (2) (_epcom_) |
### Allwinner Technology |
| * On-CPU 10/100 Ethernet MAC (_epe_) |
Various boards based on [[Allwinner]] SoCs are supported, including the BananaPi, Cubieboard 2, Cubietruck, Cubieboard 4, and Merrii Hummingbird A31. |
| * CompactFlash socket (_wdc_) |
|
| * USB 1.1 ports (2) (_ohci_) |
|
| * Watchdog timer on CPLD (_tspld_) |
|
| * TMP124 high precision temperature sensor via sysctl |
|
| * 64Hz system clock from on-CPU timers (_epclk_) |
|
| * HD44780 2x24 text mode LCD (_tslcd_) |
|
| * 4x4 16 button matrix keypad (_wskbd_) |
|
| * TS-5620 battery backed RTC daughter-card (_tsrtc_) |
|
| * 1,2,4 port serial TS-SER daughter cards (_com_) |
|
| * Up to 4 10Mb TS-ETH10 daughter cards (_tscs_) |
|
| * Other devices inserted into the PC/104 (_isa_) expansion slot |
|
| |
|
| * ARM, Ltd. **Integrator** |
### Arcom **Viper** |
| |
|
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The Arcom Viper is a single board computer based on the PXA255 XScale |
| |
processor. |
| |
|
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Support for the Arcom Viper was written by Antti Kantee. |
| |
|
| |
* On-chip timers (_saost_ used as system clock) |
| |
* On-chip serial ports (_com_) |
| |
* On-board SMC91C111 ethernet (_sm_) |
| |
|
| |
### ARM, Ltd. **Integrator** |
| |
|
| The Integrator/AP is an ATX form-factor board that is used for development of |
The Integrator/AP is an ATX form-factor board that is used for development of |
| ARM processor-based designs. It supports up to four processors on plug-in core |
ARM processor-based designs. It supports up to four processors on plug-in core |
|
Line 52 Integrator/AP can also be inserted into
|
Line 139 Integrator/AP can also be inserted into
|
| Support for the Integrator was written by Richard Earnshaw, and contributed by |
Support for the Integrator was written by Richard Earnshaw, and contributed by |
| ARM, Ltd. |
ARM, Ltd. |
| |
|
| * PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_) |
* PrimeCell PL010 UARTs in the System Controller FPGA (_plcom_) |
| * PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_) |
* PrimeCell PL030 Real-time Clock in the System Controller FPGA (_plrtc_) |
| * Other devices inserted into the PCI expansion slots |
* PrimeCell PL181 MultiMedia Card Interface |
| |
* Other devices inserted into the PCI expansion slots |
| |
|
| * Intel **IQ31244** |
### Atmark Techno **Armadillo-9** |
| |
|
| The IQ31244 is a development platform for the Intel **IOP321** I/O Processor |
The Armadillo-9 is a single board computer based on the EP9315 processor. |
| chipset and the Intel **i31244** SATA controller. |
|
| |
|
| Initial support for the IQ31244 was written by Jason Thorpe, and contributed |
Support for the Armadillo-9 was written by Katsuomi Hamajima. |
| by Wasabi Systems, Inc. |
|
| |
|
| * Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_) |
* On-CPU RS232 UARTs (2) (_epcom_) |
| * On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_) |
* On-CPU 10/100 Ethernet MAC (_epe_) |
| * On-board NS16550-compatible serial port (_com_) |
* system clock from on-CPU timers (_epclk_) |
| * On-chip timers (TMR0 used as system clock) |
* CompactFlash socket (_eppcic_) |
| * On-chip Application Accelerator Unit (_iopaau_) |
* USB 1.1 ports (_ohci_) |
| * On-chip watchdog timer (_iopwdog_) |
|
| * On-board compact flash reader (_wdc_) |
|
| * Other devices inserted into the PCI-X expansion slot |
|
| |
|
| * Intel **IQ80310** |
### BeagleBoard.org **BeagleBoard** and **BeagleBoard-xM** |
| |
The [[BeagleBoard]] is a low-power open-source hardware single-board computer from BeagleBoard.org. |
| |
|
| The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor |
### BeagleBoard.org **BeagleBone** and **BeagleBone Black** |
| chipset, which is comprised of the i80200 XScale processor and the i80312 I/O |
The [[BeagleBone]] is a low-cost credit-card-sized computer from BeagleBoard.org. |
| Companion chip. |
|
| |
|
| Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and |
### Gumstix, Inc. **gumstix** |
| contributed by Wasabi Systems, Inc. |
|
| |
|
| * On-board Intel i82559 Ethernet on the PCI bus (_fxp_) |
The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard |
| * On-board timer in the CPLD (used as system clock) |
based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now. |
| * On-board NS16550-compatible serial ports (_com_) |
|
| * Other devices inserted into the PCI expansion slots |
|
| |
|
| * Intel **IQ80321** |
Support for the gumstix was written by KIYOHARA Takashi. |
| |
|
| The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor |
* basix |
| (i80321 XScale processor). |
* cfstix |
| |
* etherstix |
| |
* netCF |
| |
* netDUO |
| |
* netDUO-mmc |
| |
* netMMC |
| |
|
| Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi |
When booting, it is necessary to set these with u-boot dynamically. |
| Systems, Inc. |
|
| |
|
| * On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_) |
<pre> > go 0xa0200000 busheader=basix</pre> |
| * On-board NS16550-compatible serial port (_com_) |
|
| * On-chip timers (TMR0 used as system clock) |
|
| * On-chip Application Accelerator Unit (_iopaau_) |
|
| * On-chip watchdog timer (_iopwdog_) |
|
| * Other devices inserted into the PCI-X expansion slots |
|
| |
|
| * Team ASA, Inc. **Npwr** |
* audiostix |
| |
* console-st (waysmall - STUART) |
| |
* console-hw (waysmall) |
| |
* GPSstix (GPS not test) |
| |
* tweener |
| |
|
| The Npwr is an IOP310-based design targeted at the network-attached storage |
### Hardkernel ODROID-C1 and ODROID-C1+ |
| space. The Npwr comes in several configurations (single or dual Gigabit |
|
| Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board |
|
| or as a small server appliance. More information on the Npwr can be found at |
|
| the [Team ASA web page](http://www.teamasa.com/). |
|
| |
|
| Support for the Npwr was written by Jason Thorpe and Allen Briggs, and |
The [[ODROID-C1]] is a quad core Cortex-A5 small form-factor board from Hardkernel co., Ltd. |
| contributed by Wasabi Systems, Inc. |
|
| |
|
| * On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_) |
### Intel **DBPXA250** ("Lubbock") |
| * On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_) |
|
| * On-board timer in the CPLD (used as system clock) |
|
| * On-board NS16550-compatible serial port (_com_) |
|
| |
|
| * Intel **IXM1200** |
DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the |
| |
Intel **PXA250** XScale Core application processor. More information about the **DBPXA250** can be found at [Intel website](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm). |
| |
|
| The IXM1200 is the reference platform for the Intel **IXP1200** Network |
Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed |
| Processor. |
by Genetec Corp. |
| |
|
| Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki. |
* On-chip timers (_saost_ used as system clock) |
| |
* On-chip 2 serial port (_com_) |
| |
* On-board SMC91C96 ethernet (_sm_) |
| |
* On-board SA-1111 StrongArm companion chip (_sacc_) |
| |
* PS/2 keyboard (_pckbd_) |
| |
* 640x480 LCD (_lcd_) |
| |
* PCMCIA and CF card slots |
| |
|
| * On-board Intel i82559 Ethernet on the PCI bus (_fxp_) |
### Intel **IQ31244** |
| * On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_) |
|
| * On-chip timers (ixpclk0 used as system clock) |
|
| * On-chip serial port (_ixpcom_) |
|
| |
|
| * Samsung **SMDK2410** |
The IQ31244 is a development platform for the Intel **IOP321** I/O Processor |
| |
chipset and the Intel **i31244** SATA controller. |
| |
|
| The SMDK2410 is the reference platform for the Samsung **S3C2410** processor, |
Initial support for the IQ31244 was written by Jason Thorpe, and contributed |
| which has an ARM920T core. |
by Wasabi Systems, Inc. |
| |
|
| More information on the S3C2410 can be found at [Samsung Electronics web page] |
* Quad on-board Intel i31244 SATA controllers on the PCI-X bus (_artsata_) |
| (http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/ |
* On-board Intel i82546EB Gigabit Ethernet on the PCI-X bus (_wm_) |
| ARM9Series/S3C2410/S3C2410.htm). |
* On-board NS16550-compatible serial port (_com_) |
| |
* On-chip timers (TMR0 used as system clock) |
| |
* On-chip Application Accelerator Unit (_iopaau_) |
| |
* On-chip watchdog timer (_iopwdog_) |
| |
* On-board compact flash reader (_wdc_) |
| |
* Other devices inserted into the PCI-X expansion slot |
| |
|
| Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by |
### Intel **IQ80310** |
| Genetec Corp. |
|
| |
|
| * On-chip serial ports (_sscom_) |
The IQ80310 is the reference platform for the Intel **IOP310** I/O Processor |
| * On-chip USB host controller (_ohc_) |
chipset, which is comprised of the i80200 XScale processor and the i80312 I/O |
| * On-chip timers (used as system clock) |
Companion chip. |
| * On-chip SPI (_ssspi_, used for other on-board devices) |
|
| * 240x320 TFT LCD (_lcd_) |
|
| * keyboard. (_sskbd_) |
|
| |
|
| * Samsung **SMDK2800** |
Support for the IQ80310 was written by Jason Thorpe and Allen Briggs, and |
| |
contributed by Wasabi Systems, Inc. |
| |
|
| The SMDK2800 is the reference platform for the **Samsung S3C2800** processor, |
* On-board Intel i82559 Ethernet on the PCI bus (_fxp_) |
| which has an ARM920T core. |
* On-board timer in the CPLD (used as system clock) |
| |
* On-board NS16550-compatible serial ports (_com_) |
| |
* Other devices inserted into the PCI expansion slots |
| |
|
| S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots. |
### Intel **IQ80321** |
| |
|
| Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by |
The IQ80321 is the reference platform for the Intel **IOP321** I/O Processor |
| Fujitsu Component Ltd., and Genetec Corp. |
(i80321 XScale processor). |
| |
|
| * On-chip serial ports (_sscom_) |
Support for the IQ80321 was written by Jason Thorpe, and contributed by Wasabi |
| * On-chip Host-PCI bridge (_sspci_) |
Systems, Inc. |
| * On-chip timers (used as system clock) |
|
| * Other devices inserted into the PCI slots |
|
| |
|
| * ADI Engineering **BRH** ("Big Red Head") |
* On-board Intel i82544EI Gigabit Ethernet on the PCI-X bus (_wm_) |
| |
* On-board NS16550-compatible serial port (_com_) |
| |
* On-chip timers (TMR0 used as system clock) |
| |
* On-chip Application Accelerator Unit (_iopaau_) |
| |
* On-chip watchdog timer (_iopwdog_) |
| |
* Other devices inserted into the PCI-X expansion slots |
| |
|
| The BRH is an evaluation and development platform for the Intel **i80200** |
### Intel **IXM1200** |
| XScale processor. The BRH is based on ADI's **BECC** ("Big Endian Companion |
|
| Chip"). The BRH is capable of both big- and little-endian operation, although |
|
| NetBSD currently only supports little-endian operation. More information about |
|
| the BRH can be found on [ADI Engineering's web |
|
| page](http://www.adiengineering.com/productsBRH.html). |
|
| |
|
| Support for the BRH was written by Jason Thorpe, and contributed by Wasabi |
The IXM1200 is the reference platform for the Intel **IXP1200** Network |
| Systems, Inc. |
Processor. |
| |
|
| * On-board NS16550-compatible serial ports (_com_) |
Support for the IXM1200 was written by Ichiro FUKUHARA and Naoto Shimazaki. |
| * On-board Intel i82559 Ethernet on the PCI bus (_fxp_) |
|
| * On-chip timer on the BECC (used as system clock) |
|
| * Other devices inserted into the PCI slot |
|
| |
|
| The BRH comes with 128M of SDRAM. Systems with BECC revision 7 or less are |
* On-board Intel i82559 Ethernet on the PCI bus (_fxp_) |
| limited to 64M due to the layout of the PCI DMA windows. Users of these |
* On-board Intel i21555 Non-Transparent PCI-PCI Bridge (_nppb_) |
| systems should obtain an FPGA upgrade from ADI to revision 8 or later of the |
* On-chip timers (ixpclk0 used as system clock) |
| BECC. |
* On-chip serial port (_ixpcom_) |
| |
|
| * NOVATEC **NTNP425B** ("ZAO425") |
### NOVATEC **NTNP425B** ("ZAO425") |
| |
|
| NTNP425B is an evaluation and development platform for the Intel **IXP425** |
NTNP425B is an evaluation and development platform for the Intel **IXP425** |
| XScale Core NetworkProcessor. NTNP425B is based on the reference board of |
XScale Core NetworkProcessor. NTNP425B is based on the reference board of |
|
Line 198 file)](http://www.novatec.co.jp/NTNP425B
|
Line 277 file)](http://www.novatec.co.jp/NTNP425B
|
| |
|
| Support for the NTNP425B was written by Ichiro FUKUHARA. |
Support for the NTNP425B was written by Ichiro FUKUHARA. |
| |
|
| * On-chip timers (_ixpclk0_ used as system clock) |
* On-chip timers (_ixpclk0_ used as system clock) |
| * On-chip 2 serial port (_ixpcom0_ and _ixpcom1_) |
* On-chip 2 serial port (_ixpcom0_ and _ixpcom1_) |
| * Other devices inserted into the PCI/mPCI slot |
* Other devices inserted into the PCI/mPCI slot |
| * On-chip watchdog timer (_ixpwdog_) |
* On-chip watchdog timer (_ixpwdog_) |
| |
|
| * Intel **DBPXA250** ("Lubbock") |
### NVIDIA Tegra K1 |
| |
Support for NVIDIA [[Tegra]] K1 SoCs is present in NetBSD-current and |
| |
8.0_BETA. The Jetson TK1 board is currently supported. |
| |
|
| DBPXA250 (a.k.a. Lubbock) is an evaluation and development platform for the |
### Raspberry Pi Foundation **Raspberry Pi**/**Raspberry Pi 2**/**Raspberry Pi 3** |
| Intel **PXA250** XScale Core application processor. More information about the |
The [[Raspberry Pi]] is a low-cost credit-card-sized computer from the Raspberry Pi Foundation. The Raspberry Pi, Pi 2, and Pi 3 are supported. |
| **DBPXA250** can be found at [Intel web |
|
| site](http://www.intel.com/design/pca/applicationsprocessors/swsup/index.htm). |
|
| |
|
| Support for the **DBPXA250** was written by Hiroyuki Bessho, and contributed |
See the [[Raspberry Pi 1, 2 and 3|Raspberry Pi]] page for much more information. |
| by Genetec Corp. |
|
| |
|
| * On-chip timers (_saost_ used as system clock) |
### Samsung **SMDK2410** |
| * On-chip 2 serial port (_com_) |
|
| * On-board SMC91C96 ethernet (_sm_) |
|
| * On-board SA-1111 StrongArm companion chip (_sacc_) |
|
| * PS/2 keyboard (_pckbd_) |
|
| * 640x480 LCD (_lcd_) |
|
| * PCMCIA and CF card slots |
|
| |
|
| * Arcom **Viper** |
The SMDK2410 is the reference platform for the Samsung **S3C2410** processor, |
| |
which has an ARM920T core. |
| |
|
| The Arcom Viper is a single board computer based on the PXA255 XScale |
More information on the S3C2410 can be found at [Samsung Electronics web page] |
| processor. |
(http://www.samsung.com/Products/Semiconductor/MobileSoC/ApplicationProcessor/ |
| |
ARM9Series/S3C2410/S3C2410.htm). |
| |
|
| Support for the Arcom Viper was written by Antti Kantee. |
Support for the SMDK2410 was written by Hiroyuki Bessho, and contributed by |
| |
Genetec Corp. |
| |
|
| * On-chip timers (_saost_ used as system clock) |
* On-chip serial ports (_sscom_) |
| * On-chip serial ports (_com_) |
* On-chip USB host controller (_ohc_) |
| * On-board SMC91C111 ethernet (_sm_) |
* On-chip timers (used as system clock) |
| |
* On-chip SPI (_ssspi_, used for other on-board devices) |
| |
* 240x320 TFT LCD (_lcd_) |
| |
* keyboard. (_sskbd_) |
| |
|
| * Atmark Techno **Armadillo-9** |
### Samsung **SMDK2800** |
| |
|
| The Armadillo-9 is a single board computer based on the EP9315 processor. |
The SMDK2800 is the reference platform for the **Samsung S3C2800** processor, |
| |
which has an ARM920T core. |
| |
|
| Support for the Armadillo-9 was written by Katsuomi Hamajima. |
S3C2800 has built-in PCI controller, and SMDK2800 has three PCI slots. |
| |
|
| * On-CPU RS232 UARTs (2) (_epcom_) |
Support for the SMDK2800 was written by Hiroyuki Bessho, and contributed by |
| * On-CPU 10/100 Ethernet MAC (_epe_) |
Fujitsu Component Ltd., and Genetec Corp. |
| * system clock from on-CPU timers (_epclk_) |
|
| * CompactFlash socket (_eppcic_) |
|
| * USB 1.1 ports (_ohci_) |
|
| |
|
| * Gumstix, Inc. **gumstix** |
* On-chip serial ports (_sscom_) |
| |
* On-chip Host-PCI bridge (_sspci_) |
| |
* On-chip timers (used as system clock) |
| |
* Other devices inserted into the PCI slots |
| |
|
| The [gumstix](http://www.gumstix.com/) is a small form-factor motherboard |
### Team ASA, Inc. **Npwr** |
| based on the PXA255 and PXA270 XScale processor. Supports only PXA255 now. |
|
| |
|
| Support for the gumstix was written by KIYOHARA Takashi. |
The Npwr is an IOP310-based design targeted at the network-attached storage |
| |
space. The Npwr comes in several configurations (single or dual Gigabit |
| |
Ethernet, single or dual Ultra160 SCSI), and can be purchased as a bare board |
| |
or as a small server appliance. More information on the Npwr can be found at |
| |
the [Team ASA web page](http://www.teamasa.com/). |
| |
|
| * basix |
Support for the Npwr was written by Jason Thorpe and Allen Briggs, and |
| * cfstix |
contributed by Wasabi Systems, Inc. |
| * etherstix |
|
| * netCF |
|
| * netDUO |
|
| * netDUO-mmc |
|
| * netMMC |
|
| |
|
| When booting, it is necessary to set these with u-boot dynamically. |
* On-board Intel i82544 Gigabit Ethernet on the PCI bus (_wm_) |
| |
* On-board LSI Logic 53c1010 Ultra160 SCSI on the PCI bus (_siop_) |
| |
* On-board timer in the CPLD (used as system clock) |
| |
* On-board NS16550-compatible serial port (_com_) |
| |
|
| > go 0xa0200000 busheader=basix |
### Technologic Systems **TS-7200** |
| |
|
| |
The TS-7200 is a low-cost mass-produced PC/104 embedded single board computer |
| |
intended as a general purpose core for real embedded applications. The TS-7200 |
| |
uses the Cirrus Logic EP9302 ARM9 system-on-chip and comes with a PC/104 (isa) |
| |
bus and can either boot to CompactFlash or onboard flash. The board also has |
| |
general purpose digital IO and optional multichannel analog-to-digital |
| |
converters. More information on the TS-7200 can be found at [Technologic |
| |
Systems](http://www.embeddedarm.com/epc/ts7200-spec-h.html). |
| |
|
| |
Support for the TS-7200 was written by Jesse Off |
| |
|
| |
* On-CPU RS232 UARTs (2) (_epcom_) |
| |
* On-CPU 10/100 Ethernet MAC (_epe_) |
| |
* CompactFlash socket (_wdc_) |
| |
* USB 1.1 ports (2) (_ohci_) |
| |
* Watchdog timer on CPLD (_tspld_) |
| |
* TMP124 high precision temperature sensor via sysctl |
| |
* 64Hz system clock from on-CPU timers (_epclk_) |
| |
* HD44780 2x24 text mode LCD (_tslcd_) |
| |
* 4x4 16 button matrix keypad (_wskbd_) |
| |
* TS-5620 battery backed RTC daughter-card (_tsrtc_) |
| |
* 1,2,4 port serial TS-SER daughter cards (_com_) |
| |
* Up to 4 10Mb TS-ETH10 daughter cards (_tscs_) |
| |
* Other devices inserted into the PC/104 (_isa_) expansion slot |
| |
|
| * audiostix |
|
| * console-st (waysmall - STUART) |
|
| * console-hw (waysmall) |
|
| * GPSstix (GPS not test) |
|
| * tweener |
|
| """ |
""" |
| aditional=""" |
additional=""" |
| * The [NetBSD Diskless HOWTO](/docs/network/netboot/) |
* The [NetBSD Diskless HOWTO](http://www.netbsd.org/docs/network/netboot/) |
| * [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005. |
* [ Porting NetBSD/evbarm to the Arcom Viper](http://www.cs.hut.fi/~pooka/pubs/EuroBSDCon2005/viper.pdf), presented at EuroBSDCon 2005. |
| """ |
""" |
| ]] |
]] |
| [[!tag tier1port]] |
[[!tag tier1port]] |
| |
|
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