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version 1.17, 2018/10/26 21:07:34
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version 1.18, 2018/10/26 21:19:13
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Line 20 Currently there are 8 ports with Tier I
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Line 20 Currently there are 8 ports with Tier I
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| [[!table data=""" |
[[!table data=""" |
| Port |CPU |Machines |Latest Release |
Port |CPU |Machines |Latest Release |
| aarch64 |aarch64 |64-bit ARM CPUs |Not yet released |
[[aarch64]] |aarch64 |64-bit ARM CPUs |Not yet released |
| [[amd64]] |x86_64 |64-bit x86-family machines with AMD and Intel CPUs |[8.0](http://www.netbsd.org/releases/formal-8/) |
[[amd64]] |x86_64 |64-bit x86-family machines with AMD and Intel CPUs |[8.0](http://www.netbsd.org/releases/formal-8/) |
| [[evbarm]] |arm |ARM evaluation boards |[8.0](http://www.netbsd.org/releases/formal-8/) |
[[evbarm]] |arm |ARM evaluation boards |[8.0](http://www.netbsd.org/releases/formal-8/) |
| [[evbmips]] |mips |MIPS-based evaluation boards |[8.0](http://www.netbsd.org/releases/formal-8/) |
[[evbmips]] |mips |MIPS-based evaluation boards |[8.0](http://www.netbsd.org/releases/formal-8/) |
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Line 122 ports are supported.
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Line 122 ports are supported.
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| [[!table data=""" |
[[!table data=""" |
| CPU |Tier(s) |Ports(s) |
CPU |Tier(s) |Ports(s) |
| aarch64 |I |aarch64 |
aarch64 |I |[[aarch64]] |
| alpha |II |[[alpha]] |
alpha |II |[[alpha]] |
| arm |I, II |[[acorn32]] [[cats]] [[epoc32]] [[evbarm]] [[hpcarm]] [[iyonix]] [[netwinder]] [[shark]] [[zaurus]] |
arm |I, II |[[acorn32]] [[cats]] [[epoc32]] [[evbarm]] [[hpcarm]] [[iyonix]] [[netwinder]] [[shark]] [[zaurus]] |
| hppa |II |[[hppa]] |
hppa |II |[[hppa]] |
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